| Patent Number |
Title Of Patent |
Date Issued |
| 7183627 |
Independent control of polycrystalline silicon-germanium in an HBT and related structure |
February 27, 2007 |
| In one embodiment a precursor gas for growing a polycrystalline silicon-germanium region and a single crystal silicon-germanium region is supplied. The precursor gas can be, for example, GeH.sub.4. The polycrystalline silicon-germanium region can be, for example, a base contact in a |
| 7132700 |
SiGe layer having small poly grains |
November 7, 2006 |
| A disclosed embodiment is a method for fabricating a structure in a semiconductor die, the method comprising depositing a silicon buffer layer over a single crystalline region and at least one isolation region at a first pressure, where the silicon buffer layer is continuous, i.e. co |
| 7078744 |
Transistor emitter having alternating undoped and doped layers |
July 18, 2006 |
| A disclosed embodiment is a method for fabricating an emitter structure, comprising a step of conformally depositing an undoped polysilicon layer in an emitter window opening and over a base. Next, a doped polysilicon layer is non-conformally deposited over the undoped layer. Thereafter, |
| 7064073 |
Technique for reducing contaminants in fabrication of semiconductor wafers |
June 20, 2006 |
| According to one embodiment, a method for reducing contaminants in a reactor chamber is disclosed where the method comprises a step of etching the reactor chamber, which can comprise, for example, a dry etch process performed with hydrogen and HCL. Next, the reactor chamber is baked, |
| 6861308 |
Method for fabrication of SiGe layer having small poly grains and related structure |
March 1, 2005 |
| A disclosed embodiment is a method for fabricating a SiGe layer, the method comprising depositing a silicon buffer layer over a single crystalline region and at least one isolation region at a first pressure, where the silicon buffer layer is continuous, i.e. comprises small poly grains, |
| 6797578 |
Method for fabrication of emitter of a transistor and related structure |
September 28, 2004 |
| A disclosed embodiment is a method for fabricating an emitter structure, comprising a step of conformally depositing an undoped polysilicon layer in an emitter window opening and over a base. Next, a doped polysilicon layer is non-conformally deposited over the undoped layer. Thereafter, |
| 6580104 |
Elimination of contaminants prior to epitaxy and related structure |
June 17, 2003 |
| According to the disclosed method, the surface of a semiconductor wafer is covered by a protective oxide. The semiconductor wafer is then placed in a CVD reactor at a first temperature. Contaminants and the protective oxide are then removed from the surface of the semiconductor wafer at |
| 6559022 |
Method for independent control of polycrystalline silicon-germanium in an HBT |
May 6, 2003 |
| In one embodiment a precursor gas for growing a polycrystalline silicon-germanium region and a single crystal silicon-germanium region is supplied. The precursor gas can be, for example, GeH.sub.4. The polycrystalline silicon-germanium region can be, for example, a base contact in a |
| 6514886 |
Method for elimination of contaminants prior to epitaxy |
February 4, 2003 |
| According to the disclosed method, the surface of a semiconductor wafer is covered by a protective oxide. For example, the protective oxide can be silicon oxide and the semiconductor wafer can be a silicon wafer. The semiconductor wafer is then placed in a CVD reactor at a first temp |
| 6365479 |
Method for independent control of polycrystalline silicon-germanium in a silicon-germanium HBT a |
April 2, 2002 |
| In one embodiment a precursor gas for growing a polycrystalline silicon-germanium region and a single crystal silicon-germanium region is supplied. The precursor gas can be, for example, GeH.sub.4. The polycrystalline silicon-germanium region can be, for example, a base contact in a |
