| Patent Number |
Title Of Patent |
Date Issued |
| 7592252 |
Versatile system for charge dissipation in the formation of semiconductor device structures |
September 22, 2009 |
| The present invention provides a system for dissipating any aberrant charge that may accumulate during the fabrication of a semiconductor device segment (200), obviating overstress or break down damage to a focal device structure (208) that might result from uncontrolled dissipation |
| 7498219 |
Methods for reducing capacitor dielectric absorption and voltage coefficient |
March 3, 2009 |
| Semiconductor devices and fabrication methods are provided in which a capacitor dielectric is provided with phosphorus or other n-type dopants through implantation of other techniques to reduce the voltage coefficient of capacitance and/or the dielectric absorption of the capacitor. |
| 7119444 |
Versatile system for charge dissipation in the formation of semiconductor device structures |
October 10, 2006 |
| The present invention provides a system for dissipating any aberrant charge that may accumulate during the fabrication of a semiconductor device segment (200), obviating overstress or break down damage to a focal device structure (208) that might result from uncontrolled dissipation |
| 7045418 |
Semiconductor device including a dielectric layer having a gettering material located therein an |
May 16, 2006 |
| The present invention provides a semiconductor device (200), a method of manufacture therefor and an integrated circuit including the same. In one embodiment of the invention, the semiconductor device (200) includes a floating gate (230) located over a semiconductor substrate (210), wher |
| 6794700 |
Capacitor having a dielectric layer including a group 17 element |
September 21, 2004 |
| The present invention provides a capacitor 300, a method of manufacture therefor and an integrated circuit including the same. In one embodiment of the invention, the capacitor 300 includes a first conductive plate 320 located over a semiconductor substrate 310, wherein the first conduct |
| 6706635 |
Innovative method to build a high precision analog capacitor with low voltage coefficient and hy |
March 16, 2004 |
| The present invention relates to a method for forming an anlog capacitor on a semiconductor substrate. The method comprises forming a field oxide over a portion of the substrate, and forming a polysilicon layer over the field oxide layer, and subsequently forming a silicide over the poly |
