| Patent Number |
Title Of Patent |
Date Issued |
| 6970753 |
Storage and transmission of one-bit data |
November 29, 2005 |
| Apparatus for storing or transmitting a one-bit digital signal comprises an input inverter for inverting a subset of the data bits of an input one-bit digital signal, to generate a bit-inverted signal; a storage or transmission medium for storing or transmitting the bit-inverted signal; |
| 6604009 |
Signal processors |
August 5, 2003 |
| A signal processor for 1-bit signals comprises a fifth order Delta-Sigma Modulator (DSM) having an input for receiving a 1-bit signal and an output at which a processed 1-bit signal is produced by a quantizer. The quantizer receives a p-bit signal from a series of five signal integration |
| 6359632 |
Audio processing system having user-operable controls |
March 19, 2002 |
| Audio processing apparatus comprises an audio processor operable to apply audio processing operations to two or more input audio channels; user-operable adjustment controls for adjusting processing parameters associated with the audio processing operations; a display screen for displ |
| 6281885 |
Audio processing |
August 28, 2001 |
| Audio processing apparatus comprises an audio processor operable to apply one or more processing operations from a set of audio processing operations to an input audio signal; adjustment controls for adjusting processing parameters associated with each of the set of processing operat |
| 6188344 |
Signal processors |
February 13, 2001 |
| A 1-bit signal processor receives a 1-bit signal having a first sampling rate eg 64 fs. An upconverter (41) increases the sampling rate to eg 128 fs. A series of Delta Sigma Modulators (42, 43) processes the signal. The processed signal is down-converted by a converter (44) to 64 fs. As |
| 6167100 |
Digital signal processing |
December 26, 2000 |
| One-bit digital signal processing apparatus for generating an output one-bit signal by switching from a first to a second one-bit signal in response to a detection that m consecutive bits of the first and second signal are identical, the apparatus comprising means for varying m in de |
| 6061007 |
1-bit signal processing system |
May 9, 2000 |
| A 1-bit signal (44) is compressed (40, 41) by dividing it into a series of n-bit words and encoding the words according to the probability of their occurrence. |
| 6057792 |
Signal processors |
May 2, 2000 |
| An nth order Delta Sigma Modulator (DSM) where n.gtoreq.1, comprising an input (4) for receiving a 1-bit input signal having a signal component and a noise component,a quantifier (Q) for re-quantizing a p-bit signal (where p>1) to 1-bit form, the re-quantised 1-bit signal being the ou |
| 5983258 |
Apparatus and method for summing 1-bit signals |
November 9, 1999 |
| An arithmetic stage calculates the sum AX+BY where A and B are 1-bit signals and X and Y p bit coefficients X=7 and Y=3 and the corresponding bits b.sub.1 to b.sub.5 are represented together with the corresponding logical states of A and B. It will be seen that for example column b.sub.3 |
