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Inventor:
Terazawa; Tomohito
Address:
Gifu, JP
No. of patents:
4
Patents:












Patent Number Title Of Patent Date Issued
7755530 Analog to digital converter with a series of delay units July 13, 2010
An A/D converter has a series of M delay units through which a pulse signal is transmitted while being delayed in each delay unit by a delay time depending on a level of an analog signal. A unit of the converter latches the pulse signal outputted from each delay unit at N sampling ti
7330144 Analog-to-digital conversion method and analog to digital converter February 12, 2008
In an analog-to-digital converter, a generating unit executes analog-to-digital conversion of a first input signal and a second input signal based on an analog-to-digital conversion characteristic curve to generate first digital data and second digital data respectively corresponding
7268719 Analogue to digital conversion device operable on different sampling clocks September 11, 2007
In an A/D conversion device, each delay unit in a pulse delay circuit has inverters INV of m.times.n stages (m, n are positive integers), a clock generator has m-delay lines, and each delay line has inverters INV of i.times.n stages (i=1, 2, . . . , and m). Those delay lines DL1 to DLm
6940443 Analog to digital converter with a pulse delay circuit September 6, 2005
An A/D converter has a pulse delay circuit including a plurality of inverting circuits to each of which an analog voltage signal is inputted through a first pair of power supply lines. Each of the inverting circuits has a first logic gate. The A/D converter has a logic circuit having a










 
 
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