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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Tang; Sanh
Address:
Boise, ID
No. of patents:
13
Patents:












Patent Number Title Of Patent Date Issued
7989336 Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, m August 2, 2011
A method of forming a pair of conductive lines in the fabrication of integrated circuitry includes forming a trench into a damascene material received over a substrate. Conductive material is deposited over the damascene material and to within the trench to overfill the trench. The c
6759324 Method of forming a low resistance contact to underlying aluminum interconnect by depositing tit July 6, 2004
Structures and processes are disclosed for reducing electrical contact resistance between two metal layers. Specifically, a resistive aluminum oxide layer forms spontaneously on metal lines including aluminum, within a V-shaped contact via which is opened in an insulating layer through a
6437369 Method of forming dynamic random access memory circuitry and dynamic random access memory August 20, 2002
A semiconductor processing method of forming dynamic random access memory circuitry includes, a) providing an electrically conductive capacitor cell plate substrate; b) providing an electrically insulative layer over the cell plate; c) providing a layer of semiconductive material on the
6274486 Metal contact and process August 14, 2001
Structures and processes are disclosed for reducing electrical contact resistance between two metal layers. Specifically, a resistive aluminum oxide layer forms spontaneously on metal lines including aluminum, within a V-shaped contact via which is opened in an insulating layer through a
6268292 Methods for use in formation of titanium nitride interconnects July 31, 2001
A method for use in the fabrication of semiconductor devices includes forming a titanium nitride film and depositing a silicon hard mask over the titanium nitride film. The silicon hard mask is used to pattern a titanium nitride interconnect from the titanium nitride film and the sil
6162721 Semiconductor processing methods December 19, 2000
A semiconductor processing method includes: a) providing a substrate having a base region to which electrical connection is to be made; b) providing a first layer of a conductive first material; c) providing an etch stop layer over the first layer; d) etching a contact opening through th
6160296 Titanium nitride interconnects December 12, 2000
A method for use in the fabrication of semiconductor devices includes forming a titanium nitride film and depositing a silicon hard mask over the titanium nitride film. The silicon hard mask is used to pattern a titanium nitride interconnect from the titanium nitride film and the sil
5977578 Method of forming dynamic random access memory circuitry and dynamic random access memory November 2, 1999
A semiconductor processing method of forming dynamic random access memory circuitry includes, a) providing an electrically conductive capacitor cell plate substrate; b) providing an electrical insulative layer over the cell plate; c) providing a layer of semiconductive material on the in
5945350 Methods for use in formation of titanium nitride interconnects and interconnects formed using sa August 31, 1999
A method for use in the fabrication of semiconductor devices includes forming a titanium nitride film and depositing a silicon hard mask over the titanium nitride film. The silicon hard mask is used to pattern a titanium nitride interconnect from the titanium nitride film and the sil
5838068 Integrated circuitry with interconnection pillar November 17, 1998
A semiconductor processing method includes: a) providing a substrate having a base region to which electrical connection is to be made; b) providing a first layer of a conductive first material; c) providing an etch stop layer over the first layer; d) etching a contact opening through th
5834805 Dynamic random access memory circuit array and memory cell November 10, 1998
A semiconductor processing method of forming dynamic random access memory circuitry includes, a) providing an electrically conductive capacitor cell plate substrate; b) providing an electrically insulative layer over the cell plate; c) providing a layer of semiconductive material on the
5807776 Method of forming dynamic random access memory circuitry and dynamic random access memory September 15, 1998
A semiconductor processing method of forming dynamic random access memory circuitry includes, a) providing an electrically conductive capacitor cell plate substrate; b) providing an electrically insulative layer over the cell plate; c) providing a layer of semiconductive material on the
5506172 Semiconductor processing method of forming an electrical interconnection between an outer layer April 9, 1996
A semiconductor processing method includes: a) providing a substrate having a base region to which electrical connection is to be made; b) providing a first layer of a conductive first material; c) providing an etch stop layer over the first layer; d) etching a contact opening through th










 
 
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