Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Takahshi; Yasuhiko
Address:
Higashiyamato, JP
No. of patents:
5
Patents:












Patent Number Title Of Patent Date Issued
7972920 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a July 5, 2011
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate
7701020 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a April 20, 2010
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate
7495289 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a February 24, 2009
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate
7190031 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a March 13, 2007
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate
7161215 Semiconductor memory device and method of manufacturing the same, a method of manufacturing a ve January 9, 2007
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate










 
 
  Recently Added Patents
Three-dimensional shape data processing apparatus and three-dimensional shape data processing method
Method and apparatus for optimizing paging in a communication network
Web-based royalty system and user interface
Coordinate locating method and apparatus
Electronic apparatus and manufacturing method of electronic apparatus
Substrate and patterning device for use in metrology, metrology method and device manufacturing method
Surface-emitting laser light source using two-dimensional photonic crystal
  Randomly Featured Patents
Information storage medium, recording method, and recording apparatus
Control system for reducing nitrous oxide ("N.sub.2O") after selective catalytic reduction ("SCR") device light-off
Flower pot cover
Microscopic bubble generating apparatus
Attentive panoramic visual sensor
Method and system for liquid choromatography separations
Suction collection device
Method for the growth of SiC, by chemical vapor deposition, using precursors in modified cold-wall reactor
Shift knob and method of making
Image processor