Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Takahshi; Yasuhiko
Address:
Higashiyamato, JP
No. of patents:
5
Patents:












Patent Number Title Of Patent Date Issued
7972920 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a July 5, 2011
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate
7701020 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a April 20, 2010
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate
7495289 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a February 24, 2009
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate
7190031 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a March 13, 2007
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate
7161215 Semiconductor memory device and method of manufacturing the same, a method of manufacturing a ve January 9, 2007
Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate










 
 
  Recently Added Patents
Method to trace video content processed by a decoder
Method, apparatus and computer program product for visualizing whole streets based on imagery generated from panoramic street views
Wearable display device
Method, preprocessor, speech recognition system, and program product for extracting target speech by removing noise
Lighting elements
Question and answer system wherein experts are associated with models and have response rates that are associated with time intervals
Image reading apparatus
  Randomly Featured Patents
Electric sign wiring identification
Tiled phased array antenna
Folding frame log trailer
Apparatus for testing electric cables
Safety mechanism for saws
Device and method for performing electrical impedance tomography
Microporous film of polyethylene and process for the production thereof
Shock absorbing steering device and method of manufacturing the device
Node provided with facility for checking establishment of synchronization
High precision position detecting apparatus capable of removing error contained in signal