| Patent Number |
Title Of Patent |
Date Issued |
| 7356652 |
System and method for selectively storing bus information associated with memory coherency opera |
April 8, 2008 |
| A manner for judiciously snooping or otherwise monitoring bus operations associated with maintaining cache or other memory coherency in a computing system. A bus snoop information storage mode is established that identifies information pertaining to the bus snoop operations used to m |
| 7254657 |
Dual mode capability for system bus |
August 7, 2007 |
| A computing system with a mode-selectable bus interface. In one embodiment, the computing system includes a system bus, a processor coupled to the bus via an interface unit, and a controller coupled to the bus. The system bus implements one of a first and a second system bus protocol |
| 6973541 |
System and method for initializing memory within a data processing system |
December 6, 2005 |
| An improved system and method are provided for initializing memory in a data processing system. According to one aspect of the invention, a "page zero" instruction is provided that may be executed by an Instruction Processor to initiate memory initialization. Upon instruction execution, |
| 5867731 |
System for data transfer across asynchronous interface |
February 2, 1999 |
| A system for use in transferring data packets across different clock domains using an input data register for receiving a block of data packets with the input data register and a plurality of interface registers located in the first clock domain for transferring a block of data packets |
| 5809540 |
Processor command for prompting a storage controller to write a day clock value to specified mem |
September 15, 1998 |
| A method and apparatus for efficiently reading a day clock and storing the value into main storage. An advantage is that the memory storage command can request the main storage control to read a current day clock value and store the value into a main storage location specified by the req |
