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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Stewart; Duncan R.
Address:
Menlo Park, CA
No. of patents:
7
Patents:












Patent Number Title Of Patent Date Issued
8268720 Method of positioning catalyst nanoparticle and nanowire-based device employing same September 18, 2012
A method of positioning a catalyst nanoparticle that facilitates nanowire growth for nanowire-based device fabrication employs a structure having a vertical sidewall formed on a substrate. The methods include forming the structure, forming a targeted region in a surface of either the str
7906778 Methods of making nano-scale structures having controlled size, nanowire structures and methods March 15, 2011
Methods of making nanometer-scale semiconductor structures with controlled size are disclosed. Semiconductor structures that include one or more nanowires are also disclosed. The nanowires can include a passivation layer or have a hollow tube structure.
7766640 Contact lithography apparatus, system and method August 3, 2010
A contact lithography apparatus, system and method use a deformation to facilitate pattern transfer. The apparatus, system and method include a spacer that provides a spaced apart parallel and proximal orientation of lithographic elements, such as a mask and a substrate, when in mutual
7618752 Deformation-based contact lithography systems, apparatus and methods November 17, 2009
One or more of a contact lithography module, a pattern tool and a substrate include a strain control region to prevent deformation-related misalignment.
7443711 Non-volatile programmable impedance nanoscale devices October 28, 2008
Programmable impedance devices and methods of fabricating the devices are disclosed. The programmable impedance devices exhibit non-volatile tunable impedance properties. A programmable impedance device includes a first electrode, a second electrode and a programmable material disposed
7307271 Nanowire interconnection and nano-scale device applications December 11, 2007
A nano-colonnade structure-and methods of fabrication and interconnection thereof utilize a nanowire column grown nearly vertically from a (111) horizontal surface of a semiconductor layer to another horizontal surface of another layer to connect the layers. The nano-colonnade structure
7227379 Nanoscale latch-array processing engines June 5, 2007
One embodiment of the present invention is an array of nanoscale latches interconnected by a nanowire bus to form a latch array. Each nanoscale latch in the nanoscale-latch array serves as a nanoscale register, and is driven by a nanoscale control line. Primitive operations for the latch










 
 
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