| |
|
Inventor: Sonmore; Chad M.
Address: Blaine, MN
No. of patents: 2
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 7254657 |
Dual mode capability for system bus |
August 7, 2007 |
| A computing system with a mode-selectable bus interface. In one embodiment, the computing system includes a system bus, a processor coupled to the bus via an interface unit, and a controller coupled to the bus. The system bus implements one of a first and a second system bus protocol |
| 6973541 |
System and method for initializing memory within a data processing system |
December 6, 2005 |
| An improved system and method are provided for initializing memory in a data processing system. According to one aspect of the invention, a "page zero" instruction is provided that may be executed by an Instruction Processor to initiate memory initialization. Upon instruction execution, |
|
|
|
