| Patent Number |
Title Of Patent |
Date Issued |
| 8233310 |
Resistance-change memory |
July 31, 2012 |
| According to one embodiment, a resistance-change memory includes bit lines running in a first direction, word lines running in a second direction, and a memory cell array includes memory cells each includes a selection transistor and a variable resistance element. In a layout of firs |
| 8134349 |
Power supply circuit that outputs a voltage stepped down from a power supply voltage |
March 13, 2012 |
| A power supply circuit has a constant voltage circuit, a first MOS transistor, a second MOS transistor, a third MOS transistor, a first voltage dividing circuit that outputs a first divided voltage obtained by dividing the voltage of the output terminal by a first voltage dividing ra |
| 8085573 |
Ferroelectric memory |
December 27, 2011 |
| A ferroelectric memory of an embodiment of the present invention includes a plurality of units, in each of which a ferroelectric capacitor and a transistor are connected to each other in parallel. The memory includes first and second memory cell arrays, first and second bit lines arrange |
| 7830696 |
Ferroelectric semiconductor storage device |
November 9, 2010 |
| A ferroelectric semiconductor storage device includes: a block having a plurality of ferroelectric memory cells connected in series, each of the plurality of ferroelectric memory cells including a ferroelectric capacitor and a transistor connected in parallel to both ends of the ferr |
| 7795953 |
Voltage step-down circuit |
September 14, 2010 |
| According to an aspect of the present invention, there is provided a voltage step-down circuit including: a first NMOS connected between an external and an internal power-supply voltages through a PMOS turned ON during an active state and turned OFF during a standby state; a second N |
| 7765455 |
Semiconductor memory device |
July 27, 2010 |
| A semiconductor memory device includes a parity generation circuit which generates a parity bit corresponding to a first number of data bits, a memory cell array including memory cells, and having first and second areas, the first area storing data, the second area storing the parity |
| 7487370 |
Semiconductor device and system |
February 3, 2009 |
| According to the present invention, there is provided a semiconductor device including a power supply circuit which receives an external power supply voltage supplied, and outputs an internal power supply voltage not higher than the external power supply voltage; a system module which |
| 7417489 |
Semiconductor integrated circuit having controller controlling the change rate of power voltage |
August 26, 2008 |
| A semiconductor integrated circuit comprising: a power controller which outputs a voltage select signal for selecting one of at least two types of voltages; a power supply voltage controller which generates and outputs a power supply voltage at an arbitrary voltage change rate on the |
| 7408824 |
Ferroelectric memory with spare memory cell array and ECC circuit |
August 5, 2008 |
| A semiconductor memory comprising a memory cell array, a spare memory cell array, a spare data replacing circuit, a syndrome computing circuit, and an ECC circuit is disclosed. The data in the memory cell replaced with a memory cell in the spare memory cell array is set to 0 and then the |
| 7397687 |
Ferroelectric memory device having ferroelectric capacitor |
July 8, 2008 |
| A ferroelectric memory device includes a cell block, a bit line, and a plate line. The cell block includes a ferroelectric capacitor and a transistor switch. The bit line applies a voltage to one electrode of the ferroelectric capacitor. The plate line applies a voltage to the other |
| 7397685 |
Semiconductor memory device having error checking and correcting circuit |
July 8, 2008 |
| A semiconductor memory device includes a memory cell including a ferroelectric capacitor and a cell transistor and storing binary data at a first potential level and a second potential level which is higher than the first potential level, a bit line which reads the binary data from t |
| 7352227 |
Semiconductor device having plurality of circuits belonging to different voltage domains |
April 1, 2008 |
| A first inverter circuit comprises a first transistor in which one end of a current path is grounded, and a second transistor in which one end of a current path is connected to the other end of the current path of the first transistor. A first signal is supplied to gates of the first and |
| 7315194 |
Booster circuit |
January 1, 2008 |
| A booster circuit includes a first booster unit having a first output terminal from which a boosted voltage is output. The first output terminal is connected to an external output terminal. A second booster unit has a second output terminal from which a boosted voltage is output. The |
| 7286424 |
Semiconductor integrated circuit device |
October 23, 2007 |
| A semiconductor device includes signal lines over which signals are transferred, and a drive circuit driving the signal lines in operating modes. The operating modes include a dynamic operation mode in which the signal lines are precharged, and a static operation mode in which the si |
| 7269049 |
Ferroelectric random access memory device |
September 11, 2007 |
| A plurality of ferroelectric memory cells is arrayed. One terminal of each memory cells arrayed in the same column is connected in common to a first bit line. A gate of a transistor of memory cells arrayed in the same row is connected in common to a word line. The other terminal of each |
| 7236035 |
Semiconductor device adapted to minimize clock skew |
June 26, 2007 |
| A first logic circuit has its supply voltage controlled. A second logic circuit operates in response to an external clock signal. An adjustment circuit includes a first delay circuit supplied with the external clock signal, and a detection circuit which detects a skew between timing of a |
| 7218546 |
Integrated circuit device provided with series-connected TC parallel unit ferroelectric memory a |
May 15, 2007 |
| An integrated circuit device comprises a memory cell block, a word line selecting circuit and a driving circuit. The memory cell block comprises memory cells connected in series. The memory cell comprises a cell transistor including a gate which is connected to a word line, and a fer |
| 7138674 |
Semiconductor memory device |
November 21, 2006 |
| A semiconductor memory device includes a cell block composed of several series-connected units having a ferroelectric capacitor and a cell transistor parallel-connected to the ferroelectric capacitor and a select transistor connected to an end of the cell block. Mutually separated fi |
| 7127598 |
Semiconductor device comprising transition detecting circuit and method of activating the same |
October 24, 2006 |
| A semiconductor device includes an internal power supply, at least one semiconductor circuit block, a delay circuit, and a detecting circuit. The internal power supply outputs an initialization completion signal when initialized. The semiconductor circuit block operates on the basis |
| 7099178 |
Ferromagnetic random access memory |
August 29, 2006 |
| A ferromagnetic random access memory includes a first and second blocks. Each of the first and second blocks includes a switch transistor and memory cells connected in series between a first and second end. The memory cell includes a ferromagnetic capacitor and a cell transistor conn |
| 7075834 |
Semiconductor integrated circuit device |
July 11, 2006 |
| A semiconductor device includes signal lines over which signals are transferred, and a drive circuit driving the signal lines in operating modes. The operating modes include a dynamic operation mode in which the signal lines are precharged, and a static operation mode in which the si |
| 7053696 |
Semiconductor device with resistor element |
May 30, 2006 |
| A semiconductor device includes first, second, third and fourth resistor elements. The first to fourth resistor elements have first ends commonly connected to a first node, and operate in one of first and second operation modes which are switchable. The first and second resistor elem |
| 7016216 |
Ferroelectric memory device having ferroelectric capacitor and method of reading out data theref |
March 21, 2006 |
| A ferroelectric memory device includes memory cells, a memory cell block, a sense amplifier, a precharge circuit, a bit line drive circuit, and a plate line drive circuit. Each of the memory cells has a cell transistor and a ferroelectric capacitor in between a source and drain of the ce |
| 6990007 |
Semiconductor memory device |
January 24, 2006 |
| A semiconductor memory device includes a first cell group having serial-connected memory cells. The memory cell includes a ferroelectric capacitor and a transistor which are connected in parallel. A first bit line is selectively electrically connected to one end of the first cell gro |
| 6980460 |
Semiconductor integrated circuit device and operation method therefor |
December 27, 2005 |
| A semiconductor integrated circuit device includes first and second bit lines (BLs), first and second plate lines (PLs), a first series connected TC unit type structure connected between the first BL and the first PL, a second series connected TC unit type structure connected between the |
| 6937498 |
Semiconductor integrated circuit device |
August 30, 2005 |
| A semiconductor integrated circuit device includes connected TC unit type ferroelectric memory which includes series connected memory cells each having a cell transistor having a source terminal and a drain terminal and a ferroelectric capacitor inbetween the two terminals, a first power |
| 6917535 |
Column select circuit of ferroelectric memory |
July 12, 2005 |
| A column select gate in a ferroelectric memory is constituted by only P-channel MOS transistors. While a column select signal is set to low level, and a data line is set to 0 V, data is read out from a memory cell to a bit line. A potential amplified and held by a sense amplifier is |
| 6901026 |
Semiconductor integrated circuit equipment with asynchronous operation |
May 31, 2005 |
| A semiconductor integrated circuit device includes a memory, /CE transition detector, address transition detector, /WE transition detector and controller. The controller includes a timeout circuit. The timeout circuit generates an internal circuit control signal with preset width to cont |
| 6885575 |
Semiconductor integrated circuit device |
April 26, 2005 |
| A semiconductor integrated circuit device includes connected TC unit type ferroelectric memory which includes series connected memory cells each having a cell transistor having a source terminal and a drain terminal and a ferroelectric capacitor inbetween the two terminals, a first power |
| 6765831 |
Semiconductor integrated circuit device |
July 20, 2004 |
| A semiconductor integrated circuit device includes a memory array, address buffer, address decoder, and controller. The memory array includes a memory cell array in which destructive read-out memory cells are integrated. The address buffer outputs an internal address signal correspon |
| 6744305 |
Power supply circuit having value of output voltage adjusted |
June 1, 2004 |
| A power supply circuit includes a transistor, a variable resistance circuit, a second resistance, and an operational amplifier. The variable resistance circuit includes a plurality of first resistances. The plurality of first resistances are selected in response to control signals. T |
| 6744302 |
Voltage generator circuit for use in a semiconductor device |
June 1, 2004 |
| A voltage generator circuit generates a voltage supplied to an internal circuit. The voltage generator circuit includes first, second, and third switching elements each having first and second terminals. The first terminal of each of the switching elements is connected to the power s |
| 6560163 |
Semiconductor device including a repetitive pattern |
May 6, 2003 |
| The present invention provides a DRAM in which a first repetitive unit including a plurality of decoders for selecting a plurality of word lines and a second repetitive unit having the same arrangement as that of the first repetitive unit are arranged symmetrically with respect a boundar |
| 6477074 |
Semiconductor memory integrated circuit having high-speed data read and write operations |
November 5, 2002 |
| Read amplifiers are arranged adjacent to each other near the center of an amplifier string, thereby shortening the distances of read data paths from sense amplifiers to the read amplifiers. This can suppress the delay of a read operation caused by the wiring resistance of a data bus line |
| 6404698 |
Semiconductor memory device having column redundancy function |
June 11, 2002 |
| There is provided a semiconductor memory device which comprises a plurality of memory cells, a plurality of bit lines connected with the plurality of memory cells, a plurality of word lines connected with the plurality of memory cells, a plurality of data line pairs, a plurality of trans |
| 6362999 |
Semiconductor device including a repetitive pattern |
March 26, 2002 |
| The present invention provides a DRAM in which a first repetitive unit including a plurality of decoders for selecting a plurality of word lines and a second repetitive unit having the same arrangement as that of the first repetitive unit are arranged symmetrically with respect a boundar |
| 6288927 |
Semiconductor memory device with column gate and equalizer circuitry |
September 11, 2001 |
| A semiconductor memory device includes a semiconductor substrate and a plurality of element regions formed in the semiconductor, wherein at least one column gate and at least one equalizer are formed as a set in one element region of the plurality of element regions. In one embodiment, a |
| 6212090 |
Semiconductor device including a repetitive pattern |
April 3, 2001 |
| The present invention provides a DRAM in which a first repetitive unit including a plurality of decoders for selecting a plurality of word lines and a second repetitive unit having the same arrangement as that of the first repetitive unit are arranged symmetrically with respect a boundar |
| 6147514 |
Sense amplifier circuit |
November 14, 2000 |
| This invention provides a sense amplifier circuit capable of determining an output with small power consumption at high speeds and simplifying a control signal. The sources of a pair of driver nMOS transistors in a first amplifier are connected to VSS via an activation nMOS transistor. A |
| 6097660 |
Semiconductor memory device |
August 1, 2000 |
| A semiconductor memory device comprises a plurality of memory banks each having a plurality of memory cell arrays and a plurality of sense amplifiers such that the memory cell arrays and the sense amplifiers are alternately disposed in a first direction, the memory banks being disposed |
| 6094390 |
Semiconductor memory device with column gate and equalizer circuitry |
July 25, 2000 |
| A semiconductor memory device with a semiconductor substrate and a plurality of element regions formed in the semiconductor is shown. The semiconductor memory device further includes at least one column gate and at least one equalizer in which they are formed as a set in at least one |
| 6034914 |
Semiconductor memory device having column redundancy function |
March 7, 2000 |
| There is provided a semiconductor memory device which comprises a plurality of memory cells, a plurality of bit lines connected with the plurality of memory cells, a plurality of word lines connected with the plurality of memory cells, a plurality of data line pairs, a plurality of trans |
| 6018481 |
Dynamic semiconductor memory device |
January 25, 2000 |
| A dynamic semiconductor memory device can suppress an increase in the amount of current in the stand-by state even if the defect of short circuit occurs between a bit line and a word line by using a current limiting element controlled by a column selection line, for limiting the prec |
| 6002636 |
Semiconductor memory drive capable of canceling power supply noise |
December 14, 1999 |
| This invention discloses the layout of word line driving circuits for driving word lines. A semiconductor memory device includes a memory cell array having a bit line, n memory cells connected to the bit line, and n word lines respectively connected to the n memory cells. The semiconduct |
| 5970007 |
Semiconductor integrated circuit device |
October 19, 1999 |
| A semiconductor memory device having a sense amplifier, comprises an n-type sense amplifier formed of an nMOS transistor with a source connected to a bit line and a gate connected to an inverted bit line, and an nMOS transistor with a source connected to the inverted bit line and a gate |
| 5959908 |
Semiconductor memory device having spare word lines |
September 28, 1999 |
| An OR circuit generates a spare word line group selection signal based on output signals of address coincidence detection circuits and the OR circuit generates an upper/low-order selection signal. A spare word line selecting signal generation circuit generates a spare word line selection |
