| Patent Number |
Title Of Patent |
Date Issued |
| 6993630 |
Data pre-fetch system and method for a cache memory |
January 31, 2006 |
| A system and method for pre-fetching data signals is disclosed. According to one aspect of the invention, an Instruction Processor (IP) generates requests to access data signals within the cache. Predetermined ones of the requests are provided to pre-fetch control logic, which determines |
| 6976128 |
Cache flush system and method |
December 13, 2005 |
| A system and method is provided to selectively flush data from cache memory to a main memory irrespective of the replacement algorithm that is used to manage the cache data. According to one aspect of the invention, novel "page flush" and "cache line flush" instructions are provided to f |
| 6973541 |
System and method for initializing memory within a data processing system |
December 6, 2005 |
| An improved system and method are provided for initializing memory in a data processing system. According to one aspect of the invention, a "page zero" instruction is provided that may be executed by an Instruction Processor to initiate memory initialization. Upon instruction execution, |
| 6728835 |
Leaky cache mechanism |
April 27, 2004 |
| An apparatus for and method of improving the efficiency of a level two cache memory. In response to a level one cache miss, a request is made to the level two cache. A signal sent with the request identifies when the requester does not anticipate a near term subsequent use for the reques |
