| Patent Number |
Title Of Patent |
Date Issued |
| 7564066 |
Multi-chip assembly with optically coupled die |
July 21, 2009 |
| Disclosed are embodiments of a multi-chip assembly including optically coupled die. The multi-chip assembly may include two opposing substrates, and a number of die are mounted on each of the substrates. At least one die on one of the substrates is in optical communication with at least |
| 7554203 |
Electronic assembly with stacked IC's using two or more different connection technologies and me |
June 30, 2009 |
| An integrated circuit ("IC") package having two or more dice stacked on a substrate and electrically coupled using two or more different connection technologies may improve high-speed input/output ("I/O") bandwidth. In an embodiment, one die is a processor and at least one other die is a |
| 7538019 |
Forming compliant contact pads for semiconductor packages |
May 26, 2009 |
| In one embodiment, the present invention includes a semiconductor package having a substrate with a first surface to support a semiconductor die. A second surface of the substrate includes compliant conductive pads to provide electrical connections to the semiconductor die. In this way, |
| 7439617 |
Capillary underflow integral heat spreader |
October 21, 2008 |
| A cooling device including a thermally conductive body with a first mating surface, a first solder wettable material disposed in a pattern at a portion of the first mating surface, and a reflowable solder material disposed at the first mating surface. A portion of the solder material is |
| 7432592 |
Integrated micro-channels for 3D through silicon architectures |
October 7, 2008 |
| Some embodiments of the present invention include apparatuses and methods relating to integrated micro-channels for removing heat from 3D through silicon architectures. |
