| Patent Number |
Title Of Patent |
Date Issued |
| 7190362 |
System and method for organizing data for a 3-dimensional graphics pipeline |
March 13, 2007 |
| A system and method for pipelining three-dimensional graphical data in which two-dimensional renderings of objects are created from polygon data by transforming and lighting each polygonal vertex and then connecting the vertices. |
| 6529207 |
Identifying silhouette edges of objects to apply anti-aliasing |
March 4, 2003 |
| A graphics rendering system creates an image based on objects constructed of polygonal primitives, which can generate the perception of three-dimensional objects displayed on a two-dimensional display device. An anti-aliasing operation is applied to silhouette edges of the objects, w |
| 6219070 |
System and method for adjusting pixel parameters by subpixel positioning |
April 17, 2001 |
| A method and system for simulating motion of a polygon on a display screen. The polygon may be included in a set of polygons used to model a three-dimensional object. The position of the polygon is defined by vertices tracked in a subpixel coordinate system existing in a computer-rea |
| 6144387 |
Guard region and hither plane vertex modification for graphics rendering |
November 7, 2000 |
| Performing graphics rendering without the computational expense of hither plane clipping and with only a minimum of display image clipping. Where a three dimensional polygon crosses to both sides of a hither plane, any vertices on the back side of the hither plane are translated to the h |
| 6115050 |
Object-based anti-aliasing |
September 5, 2000 |
| A graphics rendering system creates an image based on objects constructed of polygonal primitives. Aliasing effects in the image are reduced by applying an anti-aliasing scheme to the areas of the image representing silhouette edges of the objects. The silhouette edges are anti-aliased b |
| 6100898 |
System and method of selecting level of detail in texture mapping |
August 8, 2000 |
| A system and method of selecting a level of detail in a texture-mapping system. Pixels are processed in a zig-zag traversal pattern to allow determination of vertical and horizontal change values in texture map coordinates. In this manner, accurate level of detail selection is achiev |
| 6094201 |
Polygon rendering method and system with dedicated setup engine |
July 25, 2000 |
| A system and method of rendering polygons in graphics system using incremental iterative addition in place of complex division operations. A setup engine provides relevant values to edge and span walk modules for rapid processing and rendering of polygon characteristics including mat |
| 5856829 |
Inverse Z-buffer and video display system having list-based control mechanism for time-deferred |
January 5, 1999 |
| A graphics system includes triangle-engine for real-time rendering into a displayable frame-buffer of image data derived from vertex-based deferred instructions. The system uses homogeneity values (1/w values) for z-buffer-like occlusion mapping as well as for texture mapping. Depth |
| 5798762 |
Controlling a real-time rendering engine using a list-based control mechanism |
August 25, 1998 |
| A system and method for controlling a real-time rendering engine includes a control program for defining in regions of system memory a block header and a list of flow-control instructions. |
| 5581680 |
Method and apparatus for antialiasing raster scanned images |
December 3, 1996 |
| A method and apparatus for drawing at least a two pixel wide antialiased line is described in which the apparatus utilizes an interpolator, having a set up unit and an iterator unit, and a blender. The set up unit determines various parameters of the line to be drawn and selects a pair |
| 5528738 |
Method and apparatus for antialiasing raster scanned, polygonal shaped images |
June 18, 1996 |
| A method and apparatus for drawing at least a one pixel wide antialiased line on an edge of a filled polygon. The apparatus comprises an interpolator, having a set up unit and an iterator unit, and a blender. The set up unit determines various parameters of the line to be drawn and s |
| 5528737 |
Processor-based method for rasterizing polygons at an arbitrary precision |
June 18, 1996 |
| An image processor is provided which rasterizes polygons with a minimum of computation. Pixels are tested for being inside a triangle by sorting the vertices by their values in one coordinate, rounding the vertices to the nearest pixels, and calculating two characteristic functions for p |
| 5515484 |
Method and apparatus for rendering volumetric images |
May 7, 1996 |
| A method for rendering a three dimensional graphic object in a two dimensional display space by segmenting the object into parallelepipeds and decomposing the parallelepipeds into rods of voxels that are parallel to the depth axis (Z) of the display and by projecting the rods of voxels |
| 5274754 |
Method and apparatus for generating anti-aliased vectors, arcs and circles on a video display |
December 28, 1993 |
| A method and apparatus for anti-aliasing vectors, arcs and circles comprising a plurality of pixels on a video display. The distance, d, of each pixel from the centerline of a curve is computed using a plurality of linearly dependent equations. The intensity of each pixel is set as a |
| 4941111 |
Video picking and clipping method and apparatus |
July 10, 1990 |
| The picking method and apparatus comprise: A CPU and a direct memory access (DMA) circuit which is used with a graphics microprocessor (G.mu.P) for virtually redrawing a display list from a system memory of objects in a bit map. A starting address and a number corresponding to the number |
| 4914622 |
Array-organized bit map with a barrel shifter |
April 3, 1990 |
| A graphics processor having a bit map comprising a plurality of memory planes is provided with an 8.times.8 barrel shifter which is responsive to a plurality of control signals for selectively shifting bits within the planes and/or between planes. |
| 4912658 |
Method and apparatus for addressing video RAMS and refreshing a video monitor with a variable re |
March 27, 1990 |
| A graphics controller having the capacity for translating X and Y logical addresses of words in a bit map into corresponding physical row and column addresses of words in a plurality of memory chips, for addressing selected bits within a word and for refreshing a video monitor with and w |
| 4901251 |
Apparatus and methodology for automated filling of complex polygons |
February 13, 1990 |
| A graphics co-processor that is autonomously responsive to an instruction for the filling of a complex polygon, as defined by an enumeration of P vertices is described. The co-processor preferably includes a micro-engine sequencer and ALU (arithmetic logic unit) for selecting a first ver |
| 4809169 |
Parallel, multiple coprocessor computer architecture having plural execution modes |
February 28, 1989 |
| A coprocessor architecture specifically adapted for parallel operation as one of an array of coprocessors is described. Each of the coprocessors of the array are commonly responsive to a host processor. The coprocessor architecture preferably includes a selector for enabling the resp |
| 4773044 |
Array-word-organized display memory and address generator with time-multiplexed address bus |
September 20, 1988 |
| An array-word-organized memory system comprising a plurality of columns and rows of memory chips, an address bus routed through all of the memory chips, a plurality of selectable CAS lines wherein one of the CAS lines is routed through each one of said plurality of columns of memory chip |
| 4648049 |
Rapid graphics bit mapping circuit and method |
March 3, 1987 |
| A circuit and method for a display controller especially adapted for display memories organized in arrays. The invention permits high speed modification of the contents of a display by generating the address signals of a selected linear pattern as the data block to be modified is ret |
| 4622546 |
Apparatus and method for displaying characters in a bit mapped graphics system |
November 11, 1986 |
| An apparatus and a method for character and graphics pattern generation in a bit mapped graphics display system is disclosed that includes a pixel data manager 14 for supplying character bit maps and graphics patterns to a visible display memory 22. A character information memory 24 is u |
| 4514673 |
Stepper motor controller |
April 30, 1985 |
| A stepper motor controller, for use with a main computer having vector interrupt capability, includes main address and data terminals, interrupt terminals, a select/enable terminal and control terminals, and is used to control the operation of a stepper motor pursuant to instructions fro |
