Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Schruefer; Klaus
Address:
Baldham, DE
No. of patents:
8
Patents:












Patent Number Title Of Patent Date Issued
8183120 Method of making bipolar FinFET technology May 22, 2012
One or more embodiments relate to a method, comprising forming an implant on a substrate surface; selectively etching the wafer surface to form an elongated fin including portion of the implant; forming collector/emitter regions adjacent opposing ends of the fin; and forming a base regio
8106424 Field effect transistor with a heterostructure January 31, 2012
A field effect transistor with a heterostructure includes a strained monocrystalline semiconductor layer formed on a carrier material, which has a relaxed monocrystalline semiconductor layer made of a first semiconductor material (Si) as the topmost layer. The strained monocrystallin
8067808 Apparatus of memory array using FinFETs November 29, 2011
A memory cell includes a FinFET select device and a memory element. In some embodiments a memory cell has a contact element coupled between a surface of the fin and the memory element.
8039904 Apparatus of memory array using finfets October 18, 2011
A memory cell includes a FinFET select device and a memory element. In some embodiments a memory cell has a contact element coupled between a surface of the fin and the memory element.
7888775 Vertical diode using silicon formed by selective epitaxial growth February 15, 2011
Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral dio
7824993 Field-effect transistor with local source/drain insulation and associated method of production November 2, 2010
A method for fabricating a field-effect transistor with local source/drain insulation. The method includes forming and patterning a gate stack with a gate layer and a gate dielectric on a semiconductor substrate; forming source and drain depressions at the gate stack in the semiconductor
7804110 Field effect transistor with a heterostructure September 28, 2010
A field effect transistor with a heterostructure includes a strained monocrystalline semiconductor layer formed on a carrier material, which has a relaxed monocrystalline semiconductor layer made of a first semiconductor material (Si) as the topmost layer. The strained monocrystallin
7491612 Field effect transistor with a heterostructure and associated production method February 17, 2009
A field effect transistor with a heterostructure includes a strained monocrystalline semiconductor layer formed on a carrier material, which has a relaxed monocrystalline semiconductor layer made of a first semiconductor material (Si) as the topmost layer. The strained monocrystallin










 
 
  Recently Added Patents
System and method for optimizing teams
Keypad assembly for electronic devices
Apparatus and method for transferring a data signal propagated along a bidirectional communication path within a data processing apparatus
Systems and methods for restoring images
Integrated projector system
Chair
Data modulation for groups of memory cells
  Randomly Featured Patents
Restoring soil and preventing contamination of ground water
Appending advertisements to short messaging service messages
Archery range finders and lenses
Wrinkle free extrusion coating of heat fusible foam sheet
Composite spoolable tube
Method, apparatus and computer program product for dynamically selecting compiled instructions
Memory units with packet processor for decapsulating read write access from and encapsulating response to external devices via serial packet switched protocol interface
Thermally and electrically conductive element
Apparatus for plasma etching circuit boards or the like
Polycarbonate having improved critical thickness