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Schnapp; Russell Lawrence
San Diego, CA
No. of patents:

Patent Number Title Of Patent Date Issued
8171260 Fetching all or portion of instructions in memory line up to branch instruction based on branch May 1, 2012
The invention provides a method and apparatus for branch prediction in a processor. A fetch-block branch target buffer is used in an early stage of pipeline processing before the instruction is decoded, which stores information about a control transfer instruction for a "block" of in

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