| Patent Number |
Title Of Patent |
Date Issued |
| 6459328 |
High speed voltage boosting circuit |
October 1, 2002 |
| A voltage boosting circuit includes a plurality of unit circuits provided in parallel, and a control unit. Each of the plurality of unit circuits includes a charge capacitor connected to an anode of a rectifying element at one end and to a discharge control signal at the other end, and a |
| 6381435 |
Color image forming apparatus |
April 30, 2002 |
| An image forming apparatus includes a plurality of image formation units which print an image of different color on a paper and also form positional deviation detection marks and image density regulation marks, on a conveyer belt or on at least one of a recording medium and an interm |
| 6341077 |
Boosting circuit |
January 22, 2002 |
| A boosting circuit includes at least two capacitive elements, a first switching element, and second and third switching elements. The first switching element series-connects the capacitive elements. The second and third switching elements respectively supply different power supply po |
| 5867427 |
Electrically writable nonvolatile semiconductor memory device |
February 2, 1999 |
| An electrically writable nonvolatile semiconductor memory device capable of writing data to any desired threshold value accurately without resorting to a write confirming operation is disclosed. The memory device senses a current flowing through a memory cell transistor while effecting a |
| 5757202 |
Semiconductor device having a test mode setting circuit |
May 26, 1998 |
| In a semiconductor device having "N" input terminals, a high voltage for a mode switching is applied to a first input terminal, and mode setting information is supplied to the other input terminals. A latch circuit holds the mode setting information supplied during a predetermined period |
| 5708605 |
Nonvolatile semiconductor memory device having variable writing and erasing time periods |
January 13, 1998 |
| In a nonvolatile semiconductor memory device, a nonvolatile counter is provided to store a number of erasing operations. A time period of a writing operation upon a memory cell is changed in accordance with the number of erasing operations. Also, a time period of an erasing operation |
| 5657272 |
Non-volatile semiconductor memory and data erasing method for the same |
August 12, 1997 |
| The non-volatile semiconductor memory disclosed includes an X-decoder and word line potential supply circuits, and a current setting/holding circuit. The X-decoder and the word line potential supply circuits set all word lines ground potential in the flash erasing operation, to a pre |
| 5532959 |
Electrically erasable and programmable read only memory device equipped with inspection circuit |
July 2, 1996 |
| An electrically erasable and programmable read only memory device enters an automatic erasing mode of operation, and repeats short erasing operation followed by confirmation of proper erased state in the automatic erasing mode, wherein the memory cell array is inspected to see whether or |
| 5528162 |
Semiconductor device having a test mode setting circuit |
June 18, 1996 |
| In a semiconductor device having "N" input terminals, a high voltage for a mode switching is applied to a first input terminal, and mode setting information is supplied to the other input terminals. A latch circuit holds the mode setting information supplied during a predetermined period |
| 5450360 |
Flash EEPROM having memory cell arrays supplied respectively with erasing voltage via transfer g |
September 12, 1995 |
| Disclosed herein is a flash type EEPROM which includes a first memory cell array having a plurality of first memory cells, a second memory array having a plurality of memory cells which are smaller in number than the first memory cells, a voltage generator operatively generating an erasi |
| 5325333 |
Semiconductor memory device |
June 28, 1994 |
| A semiconductor memory device uses a memory cell array having of a plurality of cell array blocks, a redundancy cell array as a replacement for a cell array block containing a faulty memory cell, a replacement-information memory circuit for holding faulty-cell detection information a |
| 5305331 |
Data logging apparatus with memory and pattern testing device |
April 19, 1994 |
| A data logging apparatus for a device function tester comprises a first shift circuit (1) supplied with an output signal of the tester and a strobe signal for shifting the output of the tester by n rates under the timing of a basic clock (T.sub.0), a second shift circuit (2) for shifting |
| 5297095 |
Semiconductor non-volatile memory device improved in verifying operation for erased and write-in |
March 22, 1994 |
| When an electrically erasable and program read only memory device enters an erasing mode of operation, electrons are evacuated from floating gate electrodes of the floating gate type field effect transistors serving as memory cells, and the evacuation is continued over a time period |
| 5200429 |
Acne vulgaris treating |
April 6, 1993 |
| An acne vulgaris treating and preventing topica, which comprises, as an active ingredient, at least one compound selected from the group consisting of caryophyllene, cedrene, longifolene and thujopsene. The topica exhibits sufficient inhibitory activity on proliferation of Propioniba |
| 5180586 |
Acaricidal composition |
January 19, 1993 |
| An acaricidal composition is disclosed, comprising one or more compounds selected from among methyl cinnamate, ethyl cinnamate, n-propyl cinnamate, isopropyl cinnamate, n-butyl cinnamate, isobutyl cinnamate, isoamyl cinnamate, n-hexyl cinnamate, allyl cinnamate, cinnamyl acetate, cinnamy |
