| Patent Number |
Title Of Patent |
Date Issued |
| 5142635 |
Method and circuitry for performing multiple stack operations in succession in a pipelined digit |
August 25, 1992 |
| A method for performing consecutive instructions to push data onto a stack in memory in a digital computer is described. During a first clock cycle, an instruction is decoded requiring a stack push operation. A control indicator is also generated calling for a stack push operation. Durin |
| 5134693 |
System for handling occurrence of exceptions during execution of microinstructions while running |
July 28, 1992 |
| A method of handling a fault associated with a first floating point instruction upon reaching the next sequential floating point instruction is described. The first floating point instruction is decoded. A first floating point microinstruction received from a control memory is stored |
| 5036482 |
Method and circuitry for digital system multiplication |
July 30, 1991 |
| A method nad circuitry for multiplication in a digital system is described. The circuitry includes a partial product generator, a carry-save adder, a sum latch, a carry latch, an adder, a latch, circuitry for truncating, and coupling circuitry. A method and circuitry for optimizing a spe |
| 4949291 |
Apparatus and method for converting floating point data formats in a microprocessor |
August 14, 1990 |
| An apparatus and method for converting the format of the exponent portion of a biased floating point number in a microprocessor is disclosed. The present invention allows a conversion to be performed as the data is being loaded. Decoding circuitry first determines when floating point dat |
