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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Risaki; Tomomitsu
Address:
Chiba, JP
No. of patents:
9
Patents:












Patent Number Title Of Patent Date Issued
8207575 Semiconductor device and method of manufacturing the same June 26, 2012
In a well region, an irregular structure is formed in a gate width direction, and a gate electrode is formed in concave portions and on top surfaces of convex portions via an insulating film. Upper and lower source regions are formed on one side of the gate electrode in a gate length
8193060 Method of manufacturing a semiconductor device June 5, 2012
Provided is a method for manufacturing a semiconductor device. A well region formed on a semiconductor substrate includes a plurality of trench regions, and a source electrode is connected to a source region formed on a substrate surface between the trench regions. Adjacently to the sour
8168494 Trench MOS transistor and method of manufacturing the same May 1, 2012
Trench portions (10) are formed in a well (5) in order to provide unevenness in the well (5). A gate electrode (2) is formed via an insulating film (7) on the upper surface and inside of the trench portions (10). A source region (3) is formed on one side of the gate electrode (2) in
8071460 Method for manufacturing semiconductor device December 6, 2011
In a method of manufacturing a semiconductor device, a first film is formed directly on a semiconductor substrate and a second film is formed on the first film. A region of the second film is then etched to form an opening that exposes the first film. The first film is then arbitrarily
7888212 Semiconductor device and method of manufacturing the same February 15, 2011
In a well region, an irregular structure is formed in a gate width direction, and a gate electrode is formed in concave portions and on top surfaces of convex portions via an insulating film. Upper and lower source regions are formed on one side of the gate electrode in a gate length
7859049 Semiconductor device December 28, 2010
Provided is a semiconductor device. A well region (2) formed on a semiconductor substrate (1) includes a plurality of trench regions (12), and a source electrode (10) is connected to a source region (6) formed on a substrate surface between the trench regions (12). Adjacently to the
7768102 Semiconductor device August 3, 2010
A semiconductor device comprises a semiconductor chip having a rear surface provided with an uneven structure having a preselected pattern and comprised of concave and convex portions. The preselected pattern of the uneven structure is tilted so as to be in parallel to a crystal orie
7492035 Semiconductor device and method of manufacturing the same February 17, 2009
A semiconductor device has a semiconductor substrate and a high-resistance first conductivity type well region disposed on the semiconductor substrate. A low-resistance second conductivity type source region and a low-resistance second conductivity type drain region are formed in the
7242058 Lateral semiconductor device using trench structure and method of manufacturing the same July 10, 2007
A semiconductor device has a semiconductor substrate and a trench region having at least one trench disposed on a surface of the semiconductor substrate and having a trench length, a trench width and a trench depth. A well region is disposed in the substrate and surrounds the trench










 
 
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