| Patent Number |
Title Of Patent |
Date Issued |
| 7617432 |
Hierarchical design and layout optimizations for high throughput parallel LDPC decoders |
November 10, 2009 |
| High throughput parallel LDPC decoders are designed and implemented using hierarchical design and layout optimization. In a first level of hierarchy, the node processors are grouped on the LDPC decoder chip, physically co-locating the processing elements in a small area. In a second |
| 7554977 |
Method and apparatus for indicating packet boundaries in frames |
June 30, 2009 |
| Frames including a packet boundary information field indicator and, optionally, packet boundary information field in addition to packet data are described. Methods and apparatus for generating and using such frames are also described. The packet boundary indicator indicates the presence |
| 7552097 |
Methods and apparatus for decoding LDPC codes |
June 23, 2009 |
| Methods and apparatus for decoding codewords using message passing decoding techniques which are particularly well suited for use with low density parity check (LDPC) codes and long codewords are described. The described methods allow decoding graph structures which are largely compr |
| 7475103 |
Efficient check node message transform approximation for LDPC decoder |
January 6, 2009 |
| In modern iterative coding systems such as LDPC decoder and turbo-convolutional decoder in which the invention may be used, the core computations can often be reduced to a sequence of additions and subtractions alternating between logarithm and linear domains A computationally effici |
| 7434145 |
Extracting soft information in a block-coherent communication system |
October 7, 2008 |
| Data communication over a block-coherent channel in a communication system is described. Low-complexity demodulation techniques that allow good performance are described. A dwell, e.g., a set of block coherent symbols transmitted including a known symbol, e.g., a pseudo pilot symbol, are |
| 7405686 |
Methods and apparatus for implementing and/or using amplifiers and/or for performing various amp |
July 29, 2008 |
| Methods and apparatus for implementing and/or using amplifiers and performing various amplification related operations are described. The methods are well suited for use with, but not limited to, switching type amplifiers. The methods and apparatus described herein allow for the use |
| 7395490 |
LDPC decoding methods and apparatus |
July 1, 2008 |
| A flexible and relatively hardware efficient LDPC decoder is described. The decoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the decoding process. Each command of a relatively simple control code used |
| 7386306 |
Multi-carrier communications methods and apparatus |
June 10, 2008 |
| Methods and apparatus for implementing a multi-carrier communications system are described. Various approaches to a phased system deployment and system configurations resulting from different levels of deployment are described. In addition mobile node and methods of operating mobile |
| 7376885 |
Memory efficient LDPC decoding methods and apparatus |
May 20, 2008 |
| Methods and apparatus for implementing memory efficient LDPC decodes are described. In accordance with the invention message information is stored in a compressed state for check node processing operations. The state for a check node is fully updated and then subject to an extraction pro |
| 7346832 |
LDPC encoding methods and apparatus |
March 18, 2008 |
| A flexible and relatively hardware efficient LDPC encoder is described. The encoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the encoding process. Each command of a relatively simple microcode used to |
| 7289050 |
Amplification method and apparatus |
October 30, 2007 |
| Methods and apparatus for implementing and/or using amplifiers and performing various amplification related operations are described. The methods are well suited for use with, but not limited to, switching type amplifiers. The methods and apparatus described herein allow for the use |
| 7237181 |
Methods and apparatus for reducing error floors in message passing decoders |
June 26, 2007 |
| An iterative message passing decoder, e.g., an LDPC decoder, operating in conjunction with a soft input-soft output signal processing unit, e.g., an ISI detector, has an error floor performance region influenced by the decoder's sub-optimal message passing nature. Error floor reduction i |
| 7237171 |
Method and apparatus for performing low-density parity-check (LDPC) code operations using a mult |
June 26, 2007 |
| Methods and apparatus of the present invention can be used to implement a communications system wherein different devices using the same LDPC code can be implemented using different levels of parallelism. The use of a novel class of LDPC codes makes such differences in parallelism possib |
| 7231577 |
Soft information scaling for iterative decoding |
June 12, 2007 |
| Methods and apparatus for scaling soft values as part of an error correction decoding process are described. Accurate decoding depends on use of the appropriate scale factor. Selection and use of the scale factor to scale soft values is designed to improve and/or optimize decoder per |
| 7231557 |
Methods and apparatus for interleaving in a block-coherent communication system |
June 12, 2007 |
| Methods and apparatus for communication over a block-coherent communication system are described. The present invention is directed to methods of interleaving coded bits that are encoded by codes, e.g., LDPC codes, having graph structures largely comprised, e.g., of multiple identica |
| 7133853 |
Methods and apparatus for decoding LDPC codes |
November 7, 2006 |
| Methods and apparatus for decoding codewords using message passing decoding techniques which are particularly well suited for use with low density parity check (LDPC) codes and long codewords are described. The described methods allow decoding graph structures which are largely compr |
| 7127659 |
Memory efficient LDPC decoding methods and apparatus |
October 24, 2006 |
| Methods and apparatus for implementing memory efficient LDPC decodes are described. In accordance with the invention message information is stored in a compressed state for check node processing operations. The state for a check node is fully updated and then subject to an extraction pro |
| 6961888 |
Methods and apparatus for encoding LDPC codes |
November 1, 2005 |
| Methods and apparatus for encoding codewords which are particularly well suited for use with low density parity check (LDPC) codes and long codewords are described. The described methods allow encoding graph structures which are largely comprised of multiple identical copies of a muc |
| 6957375 |
Method and apparatus for performing low-density parity-check (LDPC) code operations using a mult |
October 18, 2005 |
| Methods and apparatus of the present invention can be used to implement a communications system wherein different devices using the same LDPC code can be implemented using different levels of parallelism. The use of a novel class of LDPC codes makes such differences in parallelism possib |
| 6938196 |
Node processors for use in parity check decoders |
August 30, 2005 |
| Techniques for implementing message passing decoders, e.g., LDPC decoders, are described. To facilitate hardware implementation messages are quantized to integer multiples of 1/2 ln2. Messages are transformed between more compact variable and less compact constraint node message repr |
| 6804191 |
Phase sequences for timing and access signals |
October 12, 2004 |
| Methods and apparatus for splitting Golay sequences into a plurality of subsets of sequence elements and transmitting the subsets are described. The sequence subsets include an equal number of elements, e.g., symbols, from the split sequence and are transmitted using one group of tones p |
| 6633856 |
Methods and apparatus for decoding LDPC codes |
October 14, 2003 |
| Methods and apparatus for decoding codewords using message passing decoding techniques which are particularly well suited for use with low density parity check (LDPC) codes and long codewords are described. The described methods allow decoding graph structures which are largely comprised |
