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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Renavikar; Mukul P
Address:
Chandler, AZ
No. of patents:
6
Patents:




Patent Number Title Of Patent Date Issued
7553702 Integrating a heat spreader with an interface material having reduced void size June 30, 2009
An integrated heat spreader and die coupled with solder are disclosed herein. The heat spreader may have solder reservoirs. Additionally, the heat spreader and die may be coupled during a reflow process where the gaseous pressure surrounding the integrated heat spreader and the die is
7485495 Integrated heat spreader with intermetallic layer and method for making February 3, 2009
Integrated heat spreader and die coupled with solder in a manner forming an intermetallic compound having a higher liquidus temperature than the liquidus temperature of the solder used to create the intermetallic compound are described herein.
7239517 Integrated heat spreader and method for using July 3, 2007
Integrated heat spreader and die coupled with solder. The heat spreader may have solder reservoirs. Additionally, the heat spreader and die may be coupled during a reflow process where the gaseous pressure surrounding the integrated heat spreader and the die is varied.
7205595 Polymer memory device with electron traps April 17, 2007
An embodiment of the invention reduces damage caused to a polymer ferroelectric layer in a polymer ferroelectric memory device by creating excess holes in the insulating metal nitride and/or metal oxide layers between the metal electrodes and polymer ferroelectric layer. The excess h
7183641 Integrated heat spreader with intermetallic layer and method for making February 27, 2007
Integrated heat spreader and die coupled with solder in a manner forming an intermetallic compound having a higher liquidus temperature than the liquidus temperature of the solder used to create the intermetallic compound are described herein.
7087521 Forming an intermediate layer in interconnect joints and structures formed thereby August 8, 2006
Methods of forming a microelectronic structure are described. Those methods include forming a first adhesion layer on a conductive layer, forming an intermediate layer on the first adhesion layer, and forming a barrier layer on the intermediate layer, wherein the intermediate layer i


 
 
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