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Inventor:
Rathor; Manuj
Address:
Milpitas, CA
No. of patents:
9
Patents:












Patent Number Title Of Patent Date Issued
8232175 Damascene metal-insulator-metal (MIM) device with improved scaleability July 31, 2012
A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body
8093698 Gettering/stop layer for prevention of reduction of insulating oxide in metal-insulator-metal de January 10, 2012
An electronic device includes a first electrode, a second electrode and an insulating layer between the first and second electrodes, which insulating layer may be susceptible to reduction by H.sub.2. A gettering layer is provided on and in contact with the first electrode, the getter
8093680 Metal-insulator-metal-insulator-metal (MIMIM) memory device January 10, 2012
The present memory device includes first and second electrodes, first and second insulating layers between the electrodes, the first insulating layer being in contact with the first electrode, the second insulating layer being in contact with the second electrode, and a metal layer b
8089113 Damascene metal-insulator-metal (MIM) device January 3, 2012
The present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening in the dielectric layer, providing a switching body in the opening, and providing a second
8084770 Test structures for development of metal-insulator-metal (MIM) devices December 27, 2011
In the present electronic test structure comprising, a conductor is provided, overlying a substrate. An electronic device overlies a portion of the conductor and includes a first electrode connected to the conductor, a second electrode, and an insulating layer between the first and s
8035099 Diode and resistive memory device structures October 11, 2011
In an electronic device, a diode and a resistive memory device are connected in series. The diode may take a variety of forms, including oxide or silicon layers, and one of the layers of the diode may make up a layer of the resistive memory device which is in series with that diode.
7772077 Method of forming a semiconductor structure comprising a field effect transistor having a stress August 10, 2010
A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. The first transistor element comprises at least one first amorphous region and the second transistor element comprises at
7468525 Test structures for development of metal-insulator-metal (MIM) devices December 23, 2008
In the present electronic test structure comprising, a conductor is provided, overlying a substrate. An electronic device overlies a portion of the conductor and includes a first electrode connected to the conductor, a second electrode, and an insulating layer between the first and s
7323377 Increasing self-aligned contact areas in integrated circuits using a disposable spacer January 29, 2008
In one embodiment, a method of fabricating an integrated circuit includes the steps of: (i) forming composite spacers on sidewalls of a transistor gate, each of the composite spacers comprising a first liner having a stepped portion and a disposable spacer material over the stepped p










 
 
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