| Patent Number |
Title Of Patent |
Date Issued |
| 7570930 |
Amplifier arrangement, polar transmitter having the amplifier arrangement and method for amplify |
August 4, 2009 |
| An amplifier arrangement contains a first signal input for supplying a carrier signal, a second signal input for supplying an amplitude modulation word and an amplifier stage. The amplifier stage is connected to a reference potential connection and, by means of a control connection v |
| 7554472 |
Sigma-delta modulator |
June 30, 2009 |
| A sigma-delta modulator arrangement is disclosed that has a mechanism for breaking down a data word of the input signal into subwords with a different significance. The disclosed sigma-delta modulator arrangement also has a plurality of sigma-delta modulators whose inputs are assigned |
| 7545885 |
Compensation for the carrier frequency offset in a receiving apparatus, which is designed for a |
June 9, 2009 |
| The present invention relates to a receiving apparatus for a mobile communications system which can be modulated using different modulation types at the transmitter end. According to one embodiment of the invention, in the middle of a data burst of a Bluetooth communications system, |
| 7492295 |
Self-adapting tracking analogue-to-digital converter and RF transmitter |
February 17, 2009 |
| A self-adapting analogue-to-digital converter includes a forward path with a voltage divider coupled to a digital integrator. In a feedback path, a scaler is connected to a digital-to-analogue converter. A control unit provides control signals for the voltage divider and the scaler in |
| 7453325 |
Single point modulator having a PLL circuit |
November 18, 2008 |
| A single-point modulator (1) has a PLL circuit (2) and a programmable frequency divider (7) whose control connection is connected to a circuit branch for injecting a digital modulation signal (15) which is arranged in the feedback path of the PLL circuit (2). The circuit branch contains |
| 7430265 |
Circuit arrangement provided with a phase-locked loop and transmitter-receiver with said circuit |
September 30, 2008 |
| The invention specifies a circuit arrangement with a phase locked loop (1), which can be used as a mobile radio transmitter, in particular. The reference frequency for the PLL (1), which is provided by means of the source (3), is multiplied by a multiplier (10) and is down-converted to |
| 7427903 |
Polar modulator and a use thereof |
September 23, 2008 |
| A polar modulator has a low AM-AM and AM-PM distortion comprises a phase locked loop. The phase locked loop is designed for outputting a high-frequency signal with a frequency derived from a phase modulation signal at an actuating input of the phase locked loop. A filter device, for |
| 7385404 |
Arrangement and method for testing a capacitance array in an integrated circuit |
June 10, 2008 |
| An arrangement for testing a plurality of capacitances in a capacitance array of an integrated circuit includes a power supply and a means for cyclically charging and discharging at least one of the capacitances. In this arrangement, the cycle frequency is dependent on the value of the |
| 7289005 |
Polar modulator and a method for modulation of a signal |
October 30, 2007 |
| A polar modulator contains a phase locked loop which is designed to emit a radio-frequency signal at one frequency to one output, with the frequency being derived from the reference signal and from a phase modulation signal at a control input of the phase locked loop. The modulator a |
| 7283002 |
Phase locked loop with a modulator |
October 16, 2007 |
| The invention provides a phase locked loop having a modulator which is based on a .SIGMA..DELTA. fractional N phase locked loop. In the forward path of the PLL, the output of the oscillator has an additional frequency divider which provides the output frequency of the PLL in a plurality |
| 7280056 |
Sigma-delta converter and use thereof |
October 9, 2007 |
| A sigma-delta converter has a signal input for receiving a data word. A clock signal input is designed to supply a clock signal. The sigma-delta converter includes a first clocked-operation accumulator stage whose input side is connected to the signal input, and at least one second c |
| 7276978 |
Phase locked loop comprising a sigma-delta modulator |
October 2, 2007 |
| The invention is directed to a phase locked loop with a .SIGMA..DELTA. modulator. A multimodulus divider in the feedback path of the PLL is actuated by the .SIGMA..DELTA. modulator. The latter has a design which can be described by a complex transfer function H(s) in the Laplace plan |
| 7149498 |
Detecting usable frequency channels by exploiting complex polyphase filter operation |
December 12, 2006 |
| A circuit arrangement for detecting a usable frequency channel includes first and second devices for performing frequency conversion. The first and second frequency conversion devices have respective local oscillator inputs to which respective local oscillator signals are applied. The |
| 7123101 |
Phase locked loop comprising a .SIGMA..DELTA. modulator |
October 17, 2006 |
| The invention is directed to a phase locked loop with a .SIGMA..DELTA. modulator. A multimodulus divider in the feedback path of the PLL is actuated by the .SIGMA..DELTA. modulator. The latter has a design which can be described by a complex transfer function H(s) in the Laplace plan |
| 7106141 |
Phase locked loop |
September 12, 2006 |
| The phase locked loop according to the invention has an adjustable charge pump (2) which is intended to generate a control voltage (UVCO). A voltage-controlled oscillator (4) and an evaluation unit (14) are connected downstream of said charge pump. In this case, the evaluation unit ( |
| 6995604 |
Current source circuit for generating a low-noise current and method of operating the current so |
February 7, 2006 |
| A current source circuit for generating a low-noise current has a current mirror circuit with a first and a second transistor. The current mirror circuit contains a capacitor connected between a source connection and a gate connection of the second transistor. The current mirror circuit |
