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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Poechmueller; Peter
Address:
Dresden, DE
No. of patents:
8
Patents:












Patent Number Title Of Patent Date Issued
7373562 Memory circuit comprising redundant memory areas May 13, 2008
The invention relates to a memory circuit comprising regular memory areas and redundant memory areas, redundancy circuits in each case being assigned to the redundant memory areas, each redundancy circuit having permanently settable storage elements in order, in a first setting state,
7372750 Integrated memory circuit and method for repairing a single bit error May 13, 2008
The invention relates to an integrated memory circuit having a memory cell array comprising memory cells arranged on word lines and bit lines, and having a repair circuit for repairing a single bit error in one of the memory cells, the repair circuit comprising: an error memory for stori
7372749 Methods for repairing and for operating a memory component May 13, 2008
In a method for repairing a memory component, data retention times of regular memory cells are determined. Weak regular memory cells having a data retention time that is shorter than a predetermined limit value are determined. A device is programmed in such a manner that a write or read
7359259 Method for transmission and reception of a data signal on a line pair, as well as a transmission April 15, 2008
Apparatuses and methods for transmitting and receiving a data signal on a line pair having a first transmission line and a second transmission line are provided. In one embodiment, a data signal which represents the data to be transmitted by means of a sequence of first and second signal
7349286 Memory component and addressing of memory cells March 25, 2008
A memory component comprises a plurality of memory cells that are each assigned an address, and an address memory for storing numerical values which are uniquely related to addresses of defective memory cells. An address converter having an input for receiving a first address and an
7325182 Method and circuit arrangement for testing electrical modules January 29, 2008
The invention relates to a method for testing electrical modules. A test pattern of input signals is applied to each module to be tested as test specimen, and the actual responses of the test specimen to the test pattern is compared with the desired responses. The comparison result is
7317248 Memory module having memory chips protected from excessive heat January 8, 2008
The invention relates to a memory module having a printed circuit board; having one or more memory chips which are arranged in a first region of the printed circuit board and are contact-connected by the printed circuit board; having a buffer chip for driving the memory chips and for
7298174 Circuit and method for generating an output signal November 20, 2007
A circuit comprises an output terminal, an output driver for providing an output signal at the output terminal, a switching device for producing one or more connections of the output terminal to a respective fixed or variable potential, and a control device for controlling the switching










 
 
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