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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Park; Hee-Choul
Address:
Kyungki-do, KR
No. of patents:
4
Patents:












Patent Number Title Of Patent Date Issued
5815459 Address decoding . . . semiconductor memory September 29, 1998
Methods and apparatus are disclosed for receiving and decoding address information applied to a synchronous semiconductor memory device. Separate read address and write address decoders and latches are provided for decoding the address without waiting for a determination as to whether a
5793226 Data output buffer for multiple power supplies August 11, 1998
A data output buffer circuit for a semiconductor memory device operates with two separate power supplies and prevents malfunctions caused by the sequence in which the power supplies are energized. At lease one discharge transistor is used to remove charge from the gate of one or more NMO
5732032 Semiconductor memory device having a burn-in control circuit and burn-in test method thereof March 24, 1998
A burn-in test circuit for a semiconductor memory device tests for defective memory cells. The test circuit applies a test signal that turns "off" transistors in a precharge circuit and applies a select signal to memory cells at predetermined intervals. The select signal and test signal
5659510 Integrated circuit devices with reliable fuse-based mode selection capability and methods of ope August 19, 1997
Integrated circuit chips with fuse-based mode selection capability include a first signal generator for storing a first logic state when the fuse is blown, in response to an externally generated input signal, and for generating a first option changing signal based on the stored first log










 
 
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