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Inventor: Olgiati; Andrea
Address: Bristol, GB
No. of patents: 2
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 6782445 |
Memory and instructions in computer architecture containing processor and coprocessor |
August 24, 2004 |
| In a computer system, a first processor, a second processor for use as a coprocessor to the first processor, a memory, a data buffer for buffering data to be written to or read from the memory in data bursts in accordance with burst instructions, a burst controller for executing the burs |
| 6219833 |
Method of using primary and secondary processors |
April 17, 2001 |
| The compilation of source code to a primary and a secondary processor. The method relates to reconfigurable secondary processors, and is especially relevant to secondary processors which can be reconfigured to some degree during execution of code. Selective extraction of dataflows from t |
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