| Patent Number |
Title Of Patent |
Date Issued |
| 7553731 |
Method of manufacturing semiconductor device |
June 30, 2009 |
| A semiconductor device having SJ structure has a peripheral region having a higher withstand voltage than the withstand voltage of the cell region. A semiconductor upper layer including second conductivity-type impurities and a semiconductor lower layer including first conductivity-type |
| 7465990 |
Semiconductor device having super junction structure |
December 16, 2008 |
| A super junction type semiconductor device includes a first semiconductor layer of a first conductivity type, a super junction structure, and a second semiconductor layer of a second conductivity type. The thickness of the second semiconductor layer varies such that the thickness in the |
| 7417284 |
Semiconductor device and method of manufacturing the same |
August 26, 2008 |
| A semiconductor device having SJ structure has a peripheral region having a higher withstand voltage than the withstand voltage of the cell region. A semiconductor upper layer including second conductivity-type impurities and a semiconductor lower layer including first conductivity-type |
| 7317213 |
Semiconductor device having super junction structure and method for manufacturing the same |
January 8, 2008 |
| A semiconductor device includes: a center region; a periphery region; and a semiconductor layer including pairs of a first region having a first impurity amount and a second region having a second impurity amount. The first and the second regions are alternately aligned in a plane. The |
