Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Ohno; Kazuki
Address:
Tokyo, JP
No. of patents:
8
Patents:












Patent Number Title Of Patent Date Issued
6400623 Semiconductor memory having parallel test mode June 4, 2002
A semiconductor memory (200) having a plurality of banks (10 and 20) of memory cells in which a parallel test operation can allow bits from each bank to be tested in parallel. According to one embodiment, the semiconductor memory may include a data amplifier (30) having a selection c
6337598 Reference voltage generating device and generating method of the same January 8, 2002
A reference voltage generating device and method enables dissipation current to be reduced at the time of normal operation. An oscillator outputs a voltage of a low level intermittently during a prescribed time interval. An operational amplifier operates only when an output voltage of
6147549 Reference voltage generating circuit of generating a plurality of reference voltages November 14, 2000
A reference voltage generating circuit comprises a differential amplifier having a first input connected to receive a constant voltage and a second input connected through a voltage feedback path to an output of the differential amplifier so as to receive a voltage in proportion to an a
6104664 Memory address generator circuit and semiconductor memory device August 15, 2000
A semiconductor storage device (1100) having a burst mode capability for accomplishing a rapid read/write operation is disclosed. Included is a memory address generator circuit (100) having an address counter (102) which latches and increments the n least significant bits of a start
6073219 Semiconductor memory device with high speed read-modify-write function June 6, 2000
The present invention provides a synchronous semiconductor memory device, from which data are read out, and to which the data are written after having been modified and corrected, which comprises a read data bus for transmitting said read data and a write data bus for transmitting said
5704059 Method of write to graphic memory where memory cells designated by plurality of addresses select December 30, 1997
In a method of write to a graphic memory where memory cells designated by a plurality of addresses selected simultaneously for one ROW address, the present method of write includes a first step of dividing the area corresponding to the column addresses designated by one row address of a
5654934 Semiconductor memory employing a block-write system August 5, 1997
A semiconductor memory comprises a memory cell array having bit line pairs, a pair of I/O lines, column switches connected between the pair of I/O lines and an associated one of the bit line pairs, a timing signal generator generating a timing signal, an address latch circuit latching an
5255226 Semiconductor memory device with a redundancy circuit bypassing failed memory cells October 19, 1993
In a redundancy circuit, there is provided a data-transfer path switching circuit for switching on path-switching signals paths on which data is transferred from the data-storage places of the write shift register through the memory cell array to the data-storage place. Path switching










 
 
  Recently Added Patents
Use of physical deformation during scanning of an object to generate views of the object
Dimmer system and damper circuit thereof
RFID device using single antenna for multiple resonant frequency ranges
Etching composition
Nonaqueous secondary battery with nitrile group-containing compound
Forming agent for gate insulating film of thin film transistor
Battery grid
  Randomly Featured Patents
Circuit arrangement for obtaining a sawtooth current in a coil
Single swing jaw crushing apparatus with an unobstructed feed opening
Travel alarm clock
Thin-film spectroscopic sensor
Surgical light handle
Heating means for heating a magnetic tape above its Curie point prior to duplication by contact with a master tape
Method and system for providing walking instructions with route guidance in a navigation program
Polymer-conjugated malonic acid derivatives and their use as medicaments and diagnostic agents
Transgenic mice containing a disrupted p53 gene
Connection structure of LED lamp holder and heat radiation fins