Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Oh; Yong-chul
Address:
Gyeonggi-do, KR
No. of patents:
6
Patents:












Patent Number Title Of Patent Date Issued
8053832 Capacitor-less DRAM device November 8, 2011
Provided is a capacitor-less DRAM device including: an insulating layer formed on a semiconductor substrate; a silicon layer formed on the insulating layer, wherein a trench is formed inside the silicon layer; and an offset spacer formed on both sidewalls of the trench and protruded
7977725 Integrated circuit semiconductor device including stacked level transistors July 12, 2011
An integrated circuit semiconductor device includes a first transistor formed at a lower substrate and configured with at least one of a vertical transistor and a planar transistor. A bonding insulation layer is formed on the first transistor, and an upper substrate is bonded on the
7842572 Methods of manufacturing semiconductor devices with local recess channel transistors November 30, 2010
A method of manufacturing a local recess channel transistor in a semiconductor device. A hard mask layer is formed on a semiconductor substrate that exposes a portion of the substrate. The exposed portion of the substrate is etched using the hard mask layer as an etch mask to form a
7833864 Method of doping polysilicon layer that utilizes gate insulation layer to prevent diffusion of i November 16, 2010
Embodiments prevent or substantially reduce diffusion of a P-type impurity into a channel region in a PMOS transistor having a dual gate. Some embodiments include forming a device isolation film on a semiconductor substrate, forming a channel impurity region in an active region of the
7586150 Semiconductor devices with local recess channel transistors and methods of manufacturing the sam September 8, 2009
A method of manufacturing a local recess channel transistor in a semiconductor device. A hard mask layer is formed on a semiconductor substrate that exposes a portion of the substrate. The exposed portion of the substrate is etched using the hard mask layer as an etch mask to form a
7223649 Method of fabricating transistor of DRAM semiconductor device May 29, 2007
Embodiments prevent or substantially reduce diffusion of a P-type impurity into a channel region in a PMOS transistor having a dual gate. Some embodiments include forming a device isolation film on a semiconductor substrate, forming a channel impurity region in an active region of the










 
 
  Recently Added Patents
Antibodies to Clostridium difficile toxins
Digital signal processing apparatus, liquid crystal display apparatus, digital signal processing method and computer program
Washing-up bowl
Adaptive known signal canceller
Mobile electronic device
Systems and methods for managing fleet services
Method of estimating remaining constant current/constant voltage charging time
  Randomly Featured Patents
Verbena plant `Sunmaref TP-V`
Backflow prevention system for media bed reactor
Camera body and imaging apparatus
Logic circuit with improved hysteresis characteristics
Hybrid fiber twisted pair local loop network service architecture
Shoelace warning system
Teapot and lid combination
Processes and structures for beveled slope integrated circuits for interconnect fabrication
Damped hinge and control device thereof
Drill pipe handling device