| Patent Number |
Title Of Patent |
Date Issued |
| 6777723 |
Semiconductor device having protection circuit implemented by bipolar transistor for discharging |
August 17, 2004 |
| A protection circuit prevents a circuit component from static charge unavoidably applied to a signal terminal, and includes a vertical bipolar transistor having an n-type deep well serving as an emitter region, a p-type well formed on the n-type deep well and serving as a base region |
| 6433393 |
Semiconductor protective device and method for manufacturing same |
August 13, 2002 |
| The distance between an anode and a cathode of a thyristor and the anode and the cathode of a diode formed in a semiconductor protective circuit are made a small as allowable by LSI manufacturing technology, thereby achieving fast starting speed and a low internal resistance when in the |
| 6275367 |
Semiconductor circuit device with high electrostatic breakdown endurance |
August 14, 2001 |
| In a semiconductor circuit device, an internal circuit, a common wiring pattern, a plurality of external terminals including a ground terminal, and a plurality of protection elements is provided. Each of the plurality of protection elements is connected to one of the plurality of externa |
| 6191633 |
Semiconductor integrated circuit with protection circuit against electrostatic discharge |
February 20, 2001 |
| A Semiconductor integrated circuit with a protection circuit against electrostatic discharge. A clamping element is connected with MIS transistor to prevent the breakdown under the charged device model. A parasitic bipolar transistor, a MOS transistor or MIS transistor whose gate is |
| 6175139 |
Semiconductor device and method of making the same |
January 16, 2001 |
| A semiconductor device includes a metal terminal provided on a semiconductor substrate and a protection element. The protection element includes an insulated gate field-effect transistor. The transistor has a first diffusion layer of a reverse conductive-type formed on one conductive |
| 6101078 |
Semiconductor device with protection circuit |
August 8, 2000 |
| A lead on chip (LOC) semiconductor device or a chip on lead (COL) semiconductor device with a protection circuit. Non-connection pins are made shorter than connection pins to reduce the inductance of the non-connection pins, or to obtain a different capability of the protection circu |
| 6081013 |
Semiconductor device having a reduced distance between the input resistor and the internal circu |
June 27, 2000 |
| In a semiconductor device including a semiconductor substrate, first and second external terminals, a first impurity diffusion region connected to the first external terminal, and second and third impurity diffusion regions forming a MIS transistor, one of the second and third impurity |
| 5973901 |
Semiconductor circuit device with high electrostatic breakdown endurance |
October 26, 1999 |
| In a semiconductor circuit device, an internal circuit, a common wiring pattern, a plurality of external terminals including a ground terminal, and a plurality of protection elements is provided. Each of the plurality of protection elements is connected to one of the plurality of externa |
| 5936283 |
MOSFET for input/output protective circuit having a multi-layered contact structure with multipl |
August 10, 1999 |
| According to the present invention, a MOSFET for an input/output protective circuit in which a source diffusion layer, a drain diffusion layer and a gate electrode are formed on a semiconductor substrate comprises a high melting point metal silicide layer disposed on the drain diffusion |
| 5923079 |
Single-chip system having electrostatic discharge (ESD) protective circuitry including a single |
July 13, 1999 |
| To protect a system efficiently from static electricity and electrostatic discharge (ESD) and thereby prevent the system from becoming defective, a system formed on a first conductivity-type semiconductor substrate includes a pad for receiving a signal, a protection element connected to |
| 5910675 |
Semiconductor device and method of making the same |
June 8, 1999 |
| A semiconductor device includes a metal terminal provided on a semiconductor substrate and a protection element. The protection element includes an insulated gate field-effect transistor. The transistor has a first diffusion layer of a reverse conductive-type formed on one conductive |
| 5875086 |
Semiconductor integrated circuit device equipped with protective system for directly discharging |
February 23, 1999 |
| A protective system incorporated in a semiconductor integrated circuit device has a shared discharging line and a plurality of protective circuits each having a diode and a lateral bipolar transistor coupled between an associated pad and the shared discharging line. Surge voltage app |
| 5869871 |
Semiconductor device capable of avoiding damage by ESD |
February 9, 1999 |
| In a semiconductor device including a semiconductor substrate, first and second external terminals, a first impurity diffusion region connected to the first external terminal, and second and third impurity diffusion regions forming a MIS transistor, one of the second and third impurity |
| 5859451 |
Semiconductor memory having storage capacitor connected to diffusion region through barrier laye |
January 12, 1999 |
| A memory cell comprising a MOSFET formed on a principle surface of a semiconductor substrate and an information storage capacitor having a storage electrode formed in or on the substrate so as to contact with a drain region of the MOSFET, and a capacitor electrode formed adjacent to |
| 5844281 |
Semiconductor integrated circuit device with electrostatic protective function |
December 1, 1998 |
| An input terminal and an input protective resistor of an N-type diffusion layer connected thereto are provided on a P-type semiconductor substrate. First and second N-type MOS transistors for internal circuit are connected to a grounding wiring at respective source diffusion layers. The |
| 5828107 |
Semiconductor integrated circuit device |
October 27, 1998 |
| When an element of an internal circuit is arranged in the vicinity of an input/output terminal of an LSI chip, electrostatic break down is caused in an internal circuit element by discharge current generated between an input/output terminal and a grounding terminal or a power source term |
| 5724219 |
Electrostatic protection circuit comprising plurality of protective elements |
March 3, 1998 |
| A semiconductor device according to this invention comprises a first power supply (Vcc) wiring, a second power supply (Gnd) wiring, a first, a second and a third protective elements (3-1, 3-2 and 3-3), a first connecting wiring which connects in common one ends of the first, the second a |
| 5717559 |
Input/output protection device for use in semiconductor device |
February 10, 1998 |
| An input/output protection device for protecting an internal circuit of an integrated circuit formed on a P-type substrate, from an electrostatic discharge (ESD), includes a thyristor connected between a terminal connected to the internal circuit and a common wiring conductor. The pr |
| 5710452 |
Semiconductor device having electrostatic breakdown protection circuit |
January 20, 1998 |
| A semiconductor device includes a metallic main line connected between an external terminal and an internal circuit, and a plurality of divided protection bipolar transistors connected in parallel to one another. Each of the divided protection bipolar transistors includes a collector and |
| 5706156 |
Semiconductor device having an ESD protective circuitry |
January 6, 1998 |
| A semiconductor device has a protective circuitry including a common discharge line, a first protective device connected between one of input/output terminals and the discharge line, and a second protective device connected between one of Vcc and ground terminals and the discharge li |
| 5689120 |
MOS field effect transistor in a dynamic random access memory device and method for fabricating |
November 18, 1997 |
| The present invention provides a field effect transistor comprising the following elements. An insulation film is provided on a semiconductor substrate. The insulation film has an opening positioned on a predetermined region of the semiconductor substrate. A first polysilicon film is |
| 5559362 |
Semiconductor device having double metal connection layers connected to each other and to the su |
September 24, 1996 |
| In a semiconductor device having two metal connection layers formed on a scribe line area, the metal connection layers are connected to each other and further to a semiconductor substrate. The two metal connection layers are connected to each other via contact holes arranged along the sc |
| 5521413 |
Semiconductor device having a solid metal wiring with a contact portion for improved protection |
May 28, 1996 |
| On the surface of a p-type semiconductor substrate, an n-type diffusion layer is formed. The diffusion layer is in contact with an aluminum wiring via a contact hole formed through an interlayer insulation layer to electrical connection. Immediately beneath the contact portion of the |
| 5449939 |
Semiconductor device having a protective transistor |
September 12, 1995 |
| A semiconductor device has an internal circuit, an output transistor and a protective transistor for protecting the output transistor and the internal circuit against an ESD-induced destruction caused by a surge pulse entering from an input/output terminal. The sum of a first distance |
| 5436487 |
Output circuit having three power supply lines |
July 25, 1995 |
| In an output circuit having first and second MOS transistors in series between a first power supply line and a second power supply line, and a third MOS transistor, the gates of the first and second transistors are connected to first and second input nodes, respectively, and an output |
| 5307310 |
Semiconductor memory having stacked capacitors and MOS transistors |
April 26, 1994 |
| A dynamic random access memory comprises a p-type semiconductor substrate and a plurality of first n-type diffused regions embedded in the substrate so that they extend along a first axis of the substrate parallel with first and second, opposed major surfaces of the substrate to form par |
| 5256564 |
Method for manufacturing semiconductor device having a contact structure |
October 26, 1993 |
| In order to prevent a passivation film on an inner wall of a contact hole from being thinned to thereby improve an ability of the passivation film, an interlayer insulating film is formed on a semiconductor substrate in a surface region of which a diffusion layer is formed and a contact |
| 5170232 |
MOS field-effect transistor with sidewall spacers |
December 8, 1992 |
| In a n-channel MOS transistor of LDD structure with sidewall spacers, a p-type diffusion layer is formed to be on the surface of a n.sup.- drain layer just underneath the sidewall spacer and to be separated from the channel region. The low impurity concentration drain layer therefore |
