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Nakanishi; Hiroaki
Hitachi, JP
No. of patents:

Patent Number Title Of Patent Date Issued
5859977 System for software update in manner based on processing properties of devices via maintenance n January 12, 1999
A computer system is so configured as to be divided into a control system which should have high reliability and high responsiveness and an information system which does not access the control system. They are connected via a transmission path (transmission path of control system and
5740424 Information processing system and method using time-varying database altering information April 14, 1998
There is disclosed an information processing system and method capable of coping with a wider range of subjects and intricate changes. In client server structure, time-varying database altering information received from external systems is pooled in servers and distributed to a number of
5519875 Distributed processing system for modules, each having modularized objects May 21, 1996
A distributed processing system capable of realizing efficient management of a multiplicity of objects in a large scale distributed processing comprises an objectification unit which makes it possible to handle an assembly of objects as one object and a message transfer unit by which a
4896258 Data processor provided with instructions which refer to both tagged and tagless data January 23, 1990
A data processor for execution of tagged data and tagless data has a decoder for discriminating whether the data is tagged or tagless one and in case of a tagged data, separates a tag part and uses the remaining part for address computation. The data processor also comprises a unit for
4839846 Apparatus for performing floating point arithmetic operations and rounding the result thereof June 13, 1989
An operation unit capable of performing round processing at a high speed in a floating point operation. A circuit for detecting an overflow on the condition of a signal representing all 1's in an output of a mantissa shifter and a signal representing round-up, a carry look-ahead circuit
4811269 Bit slice multiplication circuit March 7, 1989
A bit slice multiplication circuit operating to slice a multiplier, produce products for the sliced multipliers and a multiplicand and sum the products to obtain the multiplication result. The circuit includes a slicing unit for slicing the multiplicand, multiplying units corresponding
4783731 Multicomputer system having dual common memories November 8, 1988
A multicomputer system having dual common memories in which specified address areas are set within the common memories. The specified address areas are accessible irrespective of whether a CPU is in an online mode or a debug mode, while any area other than the specified address areas is
4563737 Virtual storage management January 7, 1986
A virtual storage managing system in which the storage address is managed by means of a virtual address, and the virtual storage area which can be assigned by the virtual address is divided into an address non-translation area which does not require the address translation and an address
4530050 Central processing unit for executing instructions of variable length having end information for July 16, 1985
A central processing unit for executing instructions of variable length in which an operand specifier for specifying the addressing mode of an operand is independent of an operation code for ascertaining the kind of an operation and the number of operands. Each operand specifier is forme
4494188 Method of processing an operating system in a multi-processor system January 15, 1985
An operating system (OS) is divided into units (OS processes) which are concurrently executable. When the processors concurrently request the execution of one OS process, data indicating that the requested OS process is in a ready state is loaded into a memory. The other processors r
4491912 Data processing system with improved microsubroutine facility January 1, 1985
A data processing system having a first storage for storing therein microprograms; an address register for supplying an instruction address of a microprogram to be executed into said first storage; a stack unit having a stack area for storing therein a return address of the microprogram;
4486834 Multi-computer system having dual common memory December 4, 1984
A multi-computer system having a dual common memory adapted to perform Read/Write operations by means of a plurality of computers. Each computer in the system consists of a central processing unit, a main memory and a dual memory access unit. The dual memory access unit is adapted to pro
4468733 Multi-computer system with plural serial bus loops August 28, 1984
A multi-computer system includes a plurality of data processors and at least one I/O device which is commonly accessible by the data processors. A plurality of serial bus loops are configurated in hierarchy with interbus linkage devices disposed between adjacent layers of the hierarc

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