| Patent Number |
Title Of Patent |
Date Issued |
| 7590012 |
Semiconductor storage device |
September 15, 2009 |
| Semiconductor storage device of reduced layout area having memory cell rows accessed selectively. Memory cells, each including a programmable resistive element, are connected by a bit line to form a memory cell row. Selecting circuit for selecting a memory cell row includes a first NMOS |
| 7554147 |
Memory device and manufacturing method thereof |
June 30, 2009 |
| A memory device in which both DRAM and phase-change memory (PCRAM) are mounted is provided with a DRAM bit line, a PCRAM bit line or a PCRAM source line formed on an conductive layer shared with the DRAM bit line, and a sense amplifier connected between the DRAM bit line and the PCRAM |
| 7528402 |
Electrically rewritable non-volatile memory element |
May 5, 2009 |
| A non-volatile semiconductor memory device includes a plurality of lower electrodes arranged in a matrix manner, a plurality of recording layer patterns, each being arranged on the lower electrode, that contain a phase change material, and an interlayer insulation film that is provided |
| 7508707 |
Semiconductor storage apparatus |
March 24, 2009 |
| Disclosed is a semiconductor storage apparatus in which two sorts of memories, that is, a volatile memory and a non-volatile memory, are mounted on one chip. Data of a DRAM memory array are saved in a corresponding area of a non-volatile memory before entry to a data retention mode o |
| 7502252 |
Nonvolatile semiconductor memory device and phase change memory device |
March 10, 2009 |
| For the purpose of providing a phase change memory device advantageous in layout and operation control by obtaining sufficient write current for high integrated phase change memory devices, the nonvolatile semiconductor memory device of the invention in which word lines and bit lines |
| 7492033 |
Semiconductor memory device |
February 17, 2009 |
| A semiconductor memory device includes a plurality of active regions, and a gate electrode in a fish bone shape arranged on each active region. In each active region, a plurality of source regions and a plurality of drain regions are arranged in a matrix manner. The source regions are |
| 7449711 |
Phase-change-type semiconductor memory device |
November 11, 2008 |
| A phase-change memory device includes a plurality of bit lines extending in a row direction, a plurality of selection lines extending in a column direction, and an array of memory cells each disposed at one of intersections between the bit lines and selection lines. Each memory cell |
| 7397695 |
Semiconductor memory apparatus and method for writing in the memory |
July 8, 2008 |
| A phase change memory of high compatibility with DRAM. If a cell MC0, connected to a word line WL0L, is of a low resistance, current flowing through it is higher than that flowing in a dummy cell MR0, and hence a bit line SA_B is at a potential lower than that of a bit line SA_T. This |
| 7333363 |
Semiconductor storage apparatus |
February 19, 2008 |
| Disclosed is a semiconductor storage apparatus in which two sorts of memories, that is, a volatile memory and a non-volatile memory, are mounted on one chip. Data of a DRAM memory array are saved in a corresponding area of a non-volatile memory before entry to a data retention mode o |
| 7225390 |
Semiconductor memory device provided with error correcting code circuitry |
May 29, 2007 |
| A semiconductor synchronous dynamic random access memory (SDRAM) device capable of correcting bits having a low error rate in a Pause Refresh Tail distribution and of reducing a data holding current by lengthening a refresh period so that the refresh period exceeds a period for a Pause |
| 7017027 |
Address counter control system with path switching |
March 21, 2006 |
| An address-counter control system includes a counter circuit, path switches, and a control circuit. The counter circuit includes a first series of address counters which corresponds to a non-contiguous region portion and second and third series of address counters which correspond to |
| 6795362 |
Power controlling method for semiconductor storage device and semiconductor storage device emplo |
September 21, 2004 |
| A method for controlling power for a semiconductor storage device and the semiconductor storage device are provided which enable power consumption to be greatly reduced in a standby state. The power control method uses an ultra-low power consumption mode in which power control can be exe |
