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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Nackaerts; Axel
Address:
Haasrode, BE
No. of patents:
5
Patents:












Patent Number Title Of Patent Date Issued
8136078 Optimization March 13, 2012
A method for optimizing a design for a device is disclosed. Such an optimization is performed with respect to a predetermined metric, e.g. device speed, area, power consumption or yield. In one aspect, the method comprises obtaining a design for a device. The design comprises design
8021989 Method for high topography patterning September 20, 2011
One inventive aspect is related to a method for isolating structures of a semiconductor material, comprising providing a pattern of the semiconductor material comprising at least one elevated line, defining device regions in the pattern, the device regions each comprising at least sa
7786477 Semiconductor device for measuring an overlay error, method for measuring an overlay error, lith August 31, 2010
A semiconductor device for determining an overlay error on a semiconductor substrate includes a first and a second transistor. Each transistor includes two diffusion regions associated with a gate, the diffusion regions of each transistor being arranged in a first direction. The seco
7737008 Method for making quantum dots June 15, 2010
A method for forming at least one quantum dot at at least one predetermined location on a substrate is disclosed. In one aspect, the method comprises providing a layer of semiconductor material on an insulating layer on the substrate. The layer of semiconductor material is patterned
7704850 Semiconductor device for measuring an overlay error, method for measuring an overlay error, lith April 27, 2010
A semiconductor device for determining an overlay error on a semiconductor substrate includes a first and a second transistor. Each transistor includes two diffusion regions associated with a gate, the diffusion regions of each transistor being arranged in a first direction. The seco










 
 
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