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Inventor: Nachimuthu; Murugasamy
Address: Hillsboro, OR
No. of patents: 3
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 7555671 |
Systems and methods for implementing reliability, availability and serviceability in a computer |
June 30, 2009 |
| Embodiments include systems and methods for processing Reliability, Availability and Serviceability (RAS) events in a computer system. Embodiments comprise processing critical events in a first portion of a Management Interrupt (MI) period. The MI period is chosen to be not greater t |
| 7533300 |
Configurable error handling apparatus and methods to operate the same |
May 12, 2009 |
| Configurable error handling apparatus and methods to operate the same are disclosed. An example apparatus comprises a processor core in a semiconductor package, a hardware functional block in the semiconductor package, an error handler in the semiconductor package, wherein the error |
| 7472266 |
Fault resilient boot in multi-processor systems |
December 30, 2008 |
| In some embodiments a boot progress of a System Boot Strap Processor in a multi-processor system is monitored and a boot processor failure is detected using an Application Processor. If the boot processor failure is detected at least a portion of the system is reinitialized (and/or the |
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