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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
McCarty; Chris A.
Address:
Melbourne, FL
No. of patents:
8
Patents:












Patent Number Title Of Patent Date Issued
8569896 Active area bonding compatible high current structures October 29, 2013
A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material
8274160 Active area bonding compatible high current structures September 25, 2012
A method of forming a semiconductor structure is provided. One method comprises forming a device region between a substrate and a bond pad. Patterning a conductor between the bond pad and the device region with gaps. Filling the gaps with insulation material that is harder than the c
7795130 Active area bonding compatible high current structures September 14, 2010
A method of forming a semiconductor structure is provided. One method comprises forming a device region between a substrate and a bond pad. Patterning a conductor between the bond pad and the device region with gaps. Filling the gaps with insulation material that is harder than the c
7224074 Active area bonding compatible high current structures May 29, 2007
An integrated circuit with circuits under a bond pad. In one embodiment, the integrated circuit comprises a substrate, a top conductive layer, one or more intermediate conductive layers, layers of insulating material and devices. The top conductive layer has a at least one bonding pad an
7005369 Active area bonding compatible high current structures February 28, 2006
An integrated circuit with circuits under a bond pad. In one embodiment, the integrated circuit comprises a substrate, a top conductive layer, one or more intermediate conductive layers, layers of insulating material and devices. The top conductive layer has a at least one bonding pad an
6441447 Co-patterning thin-film resistors of different compositions with a conductive hard mask and meth August 27, 2002
A first thin film resistor formed by direct etch or lift off on a first dielectric layer that covers an integrated circuit in a substrate. A second thin film resistor comprised of a different material than the first resistor, formed by direct etch or lift off on the first dielectric laye
5547896 Direct etch for thin film resistor using a hard mask August 20, 1996
In a method of etching a thin film resistor material, such as NiCr or CrSi, and of producing a thin film resistor, a non-photoresist hard mask is deposited on an exposed surface of thin film resistor material, a delineated portion of the hard mask is etched with a hydrogen peroxide e
5270265 Stress relief technique of removing oxide from surface of trench-patterned semiconductor-on-insu December 14, 1993
Creation of structural defects in a trench-isolated island structure is obviated by protecting the bottom of the trench pattern during etching of the hard mask surface oxide. A layer of photoresist is non-selectively deposited on the hard mask oxide layer and in the trench pattern, so th










 
 
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