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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Malaviya; Shashi D.
Address:
Fishkill, NY
No. of patents:
17
Patents:












Patent Number Title Of Patent Date Issued
4771328 Semiconductor device and process September 13, 1988
A method of integrated circuit fabrication and the resulting integrated circuit wherein areas of recessed oxide isolation surround active device regions and the bird's head and bird's beak formed during formation of the recessed oxide regions is eliminated by forming a deep dielectric
4758528 Self-aligned metal process for integrated circuit metallization July 19, 1988
A method of forming on a substrate a pattern of structures having a thickness on the order of one micron or less. A first insulating layer is formed on a major surface of a substrate, for example, a silicon body. A polycrystalline silicon layer is formed thereover and openings are formed
4743565 Lateral device structures using self-aligned fabrication techniques May 10, 1988
Submicron lateral device structures, such as bipolar transistors, Schottky Barrier diodes and resistors, are made using self-aligned fabrication techniques and conventional photolithography. The devices are made using individual submicron silicon protrusions which extend outwardly from a
4688073 Lateral device structures using self-aligned fabrication techniques August 18, 1987
Submicron lateral device structures, such as bipolar transistors, Schottky Barrier diodes and resistors, are made using self-aligned fabrication techniques and conventional photolithography. The devices are made using individual submicron silicon protrusions which extend outwardly from a
4661832 Total dielectric isolation for integrated circuits April 28, 1987
A fully isolated dielectric structure for isolating regions of monocrystalline silicon from one another and method for making such structure are described. The structure uses a combination of recessed oxide isolation with pairs of parallel, anisotropic etched trenches which are subse
4608589 Self-aligned metal structure for integrated circuits August 26, 1986
A self-aligned metal integrated circuit structure is described which achieves self-aligned metal to silicon contacts and sub-micron contact-to-contact and metal-to-metal spacing. The insulation between the contacts and the metal is a pattern of dielectric material having a thickness
4584763 One mask technique for substrate contacting in integrated circuits involving deep dielectric iso April 29, 1986
A one mask technique for making substrate contact from the top surface of an integrated circuit device. A thin ion implanted region of one conductivity type is formed over the entirety of a major surface of the semiconductor substrate. By lithography and etching, a shallow etched reg
4508579 Lateral device structures using self-aligned fabrication techniques April 2, 1985
Submicron lateral device structures, such as bipolar transistors, Schottky Barrier diodes and resistors, are made using self-aligned fabrication techniques and conventional photolithography. The devices are made using individual submicron silicon protrusions which extend outwardly from a
4502913 Total dielectric isolation for integrated circuits March 5, 1985
A fully isolated dielectric structure for isolating regions of monocrystalline silicon from one another and method for making such structure are described. The structure uses a combination of recessed oxide isolation with pairs of parallel, anisotropic etched trenches which are subse
4431305 High density DC stable memory cell February 14, 1984
An electronic data storage or memory array having DC stable memory cells which utilize the principle of a unique substrate biasing mechanism, whereby a channel region defined by resistive substrate material and formed under a controlled electrode becomes "pinched off" and, in the pro
4409673 Single isolation cell for DC stable memory October 11, 1983
A fully selectable static memory cell formed in a single isolation region comprises a pair of word lines, an SCR latch including an NPN device and an associated parasitic PNP device connected between the word lines, and a pair of bit lines, each of which is connected to the NPN device an
4400865 Self-aligned metal process for integrated circuit metallization August 30, 1983
A self-aligned metal process is decribed which achieves self-aligned metal to silicon contacts and sub-micron contact-to-contact and metal-to-metal spacing. The insulation between the contacts and the metal is a pattern of dielectric material having a thickness dimension in the order of
4396999 Tunneling transistor memory cell August 2, 1983
A two state memory cell includes a bipolar transistor and a tunnel diode shunted across the base-collector junction thereof. A constant operating current is established through the transistor and the tunnel diode. The voltage across the tunnel diode may thus be maintained at one of two
4319148 High speed 3-way exclusive OR logic circuit March 9, 1982
A 3-way Exclusive OR function is performed in an essentially single stage logic delay. A 3-way OR circuit produces a logical "1" output whenever at least one of three input operands is "1". A Two And Only Two logic circuit produces a logical "0" output when two and only two of the three
4196363 Open collector bit driver/sense amplifier April 1, 1980
Disclosed is an improved sense amplifier/bit driver circuit including first and second transistors connected in a current mirror configuration. A bit line connected to a plurality of memory cells is connected to the collector of the first of the two transistors while the second of the
4131861 Variable frequency oscillator system including two matched oscillators controlled by a phase loc December 26, 1978
Disclosed is a variable frequency oscillator system having a very stable center frequency and adjustable over a wide range of frequency excursions. A pair of variable frequency oscillators (VFO) are fabricated on the same integrated circuit chip so that corresponding components have
4058808 High performance analog to digital converter for integrated circuits November 15, 1977
An analog to digital converter suitable for fabrication according to integrated circuitry technology. The voltage to be converted is applied to a storage capacitor which is pulse discharged in discrete equal amounts determined by a voltage controlled constant current source. The pulses a










 
 
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