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Ma; Benny
Saratoga, CA
No. of patents:

Patent Number Title Of Patent Date Issued
7589648 Data decompression September 15, 2009
In one embodiment, a data decompression circuit for a data stream having a repeated data word is provided. The data stream is compressed into a series of data frames such that the repeated data word is removed from the series of data frames and such that each data frame corresponds to a
6828823 Non-volatile and reconfigurable programmable logic devices December 7, 2004
An integrated circuit includes non-volatile and volatile memory, with the volatile memory controlling the integrated circuit's functionality. Various techniques are disclosed for programming the different types of memory through one or more data ports to provide in-system programmability
6552595 Current-controlled high voltage discharge scheme April 22, 2003
In a programmable integrated circuit, a discharge circuit for discharging high voltage nodes provides a current path whose current is limited by a control voltage. In one embodiment, the current path is implemented by a transistor coupled to the high voltage nodes, with the control volta
6154050 Internal tristate bus with arbitration logic November 28, 2000
A programmable logic device having an internal tristate bus is provided. The internal tristate bus may be driven by a plurality of driving elements. Such a tristate bus, and the circuitry for supporting it, can be implemented on less surface area than the multitude of unidirectional
6118693 Electrically erasable non-volatile memory cell with integrated SRAM cell to reduce testing time September 12, 2000
In a programmable integrated circuit, by providing a static random access memory (SRAM) cell in each electrically erasable (E.sup.2) non-volatile memory cell, testing time of circuits configured by the E.sup.2 non-volatile memory cells can be reduced substantially. In one embodiment,
6067252 Electrically erasable non-volatile memory cell with no static power dissipation May 23, 2000
An electrically erasable non-volatile memory cell dissipates virtually no power by disabling a pull-up current when the non-volatile memory cell is programmed. In one embodiment, to properly initialize the electrically erasable non-volatile memory cell, the power of an inverting output b
5640344 Programmable non-volatile bidirectional switch for programmable logic June 17, 1997
A bidirectional passgate switch for connecting two conductors utilizes technology such as electrically erasable programmable read only memory (EEPROM). The switch includes two EEPROM components wherein the floating gates of the components are shared. In one embodiment a first n-channel

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