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Inventor: Liu; Chunbo
Address: San Jose, CA
No. of patents: 5
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 8120431 |
Variable loop bandwidth phase locked loop |
February 21, 2012 |
| An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal |
| 7589594 |
Variable loop bandwidth phase locked loop |
September 15, 2009 |
| An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal |
| 7472322 |
On-chip interface trap characterization and monitoring |
December 30, 2008 |
| A method and apparatus for testing semiconductor wafers is disclosed in which a test circuit is used that includes a waveform generator. The test circuit can test a single transistor or can test multiple transistors. A testing method is disclosed in which a supply voltage is applied to t |
| 7471118 |
Squelch detection system for high speed data links |
December 30, 2008 |
| An apparatus comprising a first comparator circuit, a second comparator circuit, a third comparator circuit, and a difference circuit. The first comparator circuit may be configured to generate a first intermediate current in response to a first input voltage and a second input voltage. |
| 6898561 |
Methods, apparatus and computer program products for modeling integrated circuit devices having |
May 24, 2005 |
| Methods, apparatus and computer program products for modeling integrated circuits having dense devices therein that experience linewidth (e.g., gate electrodes) reductions during fabrication are provided. For dense devices having electrical paths therein and first and second gate ele |
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