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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Lin; Chin-Hsiang
Address:
Hsin-Chu, TW
No. of patents:
63
Patents:


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Patent Number Title Of Patent Date Issued
8581204 Apparatus for monitoring ion implantation November 12, 2013
An apparatus for monitoring an ion distribution of a wafer comprises a first sensor and a sensor. The first sensor, the second sensor and the wafer are placed in an effective range of a uniform ion implantation current profile. A controller determines the ion dose of each region of t
8237231 Device with aluminum surface protection August 7, 2012
A semiconductor structure with a metal gate structure includes a first type field-effect transistor having a first gate including: a high k dielectric material on a substrate, a first metal layer on the high k dielectric material layer and having a first work function, and a first al
8227150 Holographic reticle and patterning method July 24, 2012
A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then
8199314 System and method for improving immersion scanner overlay performance June 12, 2012
System and method for improving immersion scanner overlay performance are described. One embodiment is a method of improving overlay performance of an photolithography immersion scanner including a wafer table having lens cooling water ("LCW") disposed in a water channel therein, the waf
8183166 Dielectric layer structure and manufacturing method thereof May 22, 2012
A method for fabricating a dielectric layer structure includes providing a substrate, blanketly forming a low-k dielectric layer of an interlayer dielectric (ILD) layer, the low-k dielectric layer covering at least a first metal interconnect structure on the substrate, blanketly forming
8180141 Wafer repair system May 15, 2012
A system for wafer repair, comprising an inspection tool being capable of extracting a wafer image of a semiconductor wafer; a direct-writing tool being capable of locally exposing the semiconductor wafer; and an information processing module configured to compare the wafer image with
8178289 System and method for photolithography in semiconductor manufacturing May 15, 2012
A method for producing a pattern on a substrate includes providing at least one exposure of the pattern onto a layer of the substrate by a higher-precision lithography mechanism and providing at least one exposure of the pattern onto a layer of the substrate by a lower-precision lith
8158306 Method and system for combining photomasks to form semiconductor devices April 17, 2012
A photomask set includes at least two masks that combine to form a device pattern in a semiconductor device. Orthogonal corners may be produced in a semiconductor device pattern to include one edge defined by a first mask and an orthogonal edge defined by a second mask. The mask set may
8153350 Method and material for forming high etch resistant double exposure patterns April 10, 2012
The present invention includes a lithography method comprising forming a first patterned resist layer including at least one opening therein over a substrate. A protective layer is formed on the first patterned resist layer and the substrate whereby a reaction occurs at the interface
8132503 Method and apparatus for planarizing gap-filling material March 13, 2012
A method an apparatus for fabricating an interconnection structure. A substrate is provided with a dielectric layer thereon. The dielectric layer comprises at least one opening therein. A gap-filling material is applied on the substrate filling the at least one opening. The gap-filli
8119992 System for overlay measurement in semiconductor manufacturing February 21, 2012
Provided is a system for overlay measurement in semiconductor manufacturing that includes a generator for exposing an overlay target to radiation and a detector for detecting reflected beams of the overlay target. The reflected beams are for overlay measurement and include at least t
8119473 High temperature anneal for aluminum surface protection February 21, 2012
The present disclosure also provides another embodiment of a method for making metal gate stacks. The method includes forming a first dummy gate and a second dummy gate on a substrate; removing a polysilicon layer from the first dummy gate, resulting in a first gate trench; forming a fir
8110345 High resolution lithography system and method February 7, 2012
Provided are a high resolution lithography system and method. In one example, a method for producing a pattern on a substrate includes separating the pattern into at least a first sub-pattern containing lines oriented in a first direction and a second sub-pattern containing lines ori
8101530 Lithography patterning method January 24, 2012
A method for fabricating an integrated circuit device is disclosed. The method is a lithography patterning method that can include providing a substrate; forming a protective layer over the substrate; forming a conductive layer over the protective layer; forming a resist layer over t
8101340 Method of inhibiting photoresist pattern collapse January 24, 2012
A method of inhibiting photoresist pattern collapse which includes the steps of providing a substrate; providing a photoresist layer on the substrate; exposing and developing the photoresist layer; applying a top anti-reflective coating layer to the photoresist layer; rinsing the pho
8088685 Integration of bottom-up metal film deposition January 3, 2012
The described embodiments of methods of bottom-up metal deposition to fill interconnect and replacement gate structures enable gap-filling of fine features with high aspect ratios without voids and provide metal films with good film quality. In-situ pretreatment of metal film(s) depo
8068208 System and method for improving immersion scanner overlay performance November 29, 2011
System and method for improving immersion scanner overlay performance are described. One embodiment is a method of improving overlay performance of an photolithography immersion scanner including a wafer table having lens cooling water ("LCW") disposed in a water channel therein, the waf
8046860 System and method for removing particles in semiconductor manufacturing November 1, 2011
A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.
7986395 Immersion lithography apparatus and methods July 26, 2011
A lithography apparatus includes an imaging lens module; a substrate table positioned underlying the imaging lens module and configured to hold a substrate; and a cleaning module adapted to clean the lithography apparatus. The cleaning module is selected from the group consisting of
7972761 Photoresist materials and photolithography process July 5, 2011
A material for use in lithography processing includes a polymer that turns soluble to a base solution in response to reaction with acid and a plurality of magnetically amplified generators (MAGs) each having a magnetic element and each decomposing to form acid bonded with the magneti
7960826 Dielectric layer structure June 14, 2011
A dielectric layer structure includes an interlayer dielectric (ILD) layer covering at least a metal interconnect structure and a single tensile hydrophobic film. The ILD layer further includes a low-k dielectric layer, and the single tensile hydrophobic film is positioned on the low
7960821 Dummy vias for damascene process June 14, 2011
An integrated circuit device and method of making the integrated circuit device are disclosed. An exemplary apparatus includes: a semiconductor layer; and a dielectric layer on the semiconductor layer, the dielectric layer having conductive vias and dummy vias formed therein, wherein the
7858532 Dielectric layer structure and manufacturing method thereof December 28, 2010
A method for fabricating a dielectric layer structure includes providing a substrate, forming at least a low-k dielectric layer on the substrate, forming a single tensile layer on the low-k dielectric layer, and performing a moisture preventing treatment on the single tensile film. T
7838386 Method and system for patterning alignment marks on a transparent substrate November 23, 2010
Disclosed is a method and a system for forming alignment marks on a transparent substrate. A light reflective layer is deposited over an optically transparent substrate of a wafer. A region is defined around an alignment mark on the optically transparent substrate. The light reflecti
7819980 System and method for removing particles in semiconductor manufacturing October 26, 2010
A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.
7811720 Utilizing compensation features in photolithography for semiconductor device fabrication October 12, 2010
A photomask set includes at least two masks that combine to form a device pattern in a semiconductor device. Orthogonal corners may be produced in a semiconductor device pattern to include one edge defined by a first mask and an orthogonal edge defined by a second mask. The mask set may
7796249 Mask haze early detection September 14, 2010
Detecting haze formation on a mask by obtaining an optical property of the mask and determining progress of the haze formation based on the obtained optical property.
7795601 Method and apparatus to improve lithography throughput September 14, 2010
The present disclosure provides a lithography apparatus with improved lithography throughput. The lithography apparatus includes a first lens system; a first substrate stage configured to receive a first radiation energy from the first lens system, and designed operable to move a sub
7789576 PEB embedded exposure apparatus September 7, 2010
The present disclosure provides a lithography apparatus. The apparatus includes an exposure module designed for exposure processing; a baking module embedded in the exposure module and designed for post exposure baking (PEB); and a control module designed to control the exposure modu
7776757 Method of fabricating high-k metal gate devices August 17, 2010
The present disclosure provides a method for fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first metal layer and a first
7767570 Dummy vias for damascene process August 3, 2010
A method of making an integrated circuit includes providing a low-k dielectric layer on a substrate, the low-k dielectric layer including or adjacent to a plurality of conductive features; patterning the low-k dielectric layer to form trenches; patterning the low-k dielectric layer t
7745889 Metal oxide semiconductor transistor with Y shape metal gate June 29, 2010
A metal oxide semiconductor (MOS) transistor with a Y structure metal gate is provided. The MOS transistor includes a substrate, a Y structure metal gate positioned on the substrate, two doping regions disposed in the substrate on two sides of the Y structure metal structure, a spacer, a
7723014 System and method for photolithography in semiconductor manufacturing May 25, 2010
A method for photolithography in semiconductor manufacturing includes providing a substrate for a wafer and providing a mask for exposing the wafer. The wafer is exposed by utilizing a combination of high angle illumination and focus drift exposure methods.
7722997 Holographic reticle and patterning method May 25, 2010
A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then
7675178 Stacked structure for forming damascene structure March 9, 2010
A method of fabricating a stacked structure for forming a damascene process is described. A doped dielectric layer is formed on a substrate. A surface treatment is performed to the dielectric layer to make the dopant concentration in an upper surface layer of the dielectric layer low
7642101 Semiconductor device having in-chip critical dimension and focus patterns January 5, 2010
A semiconductor device is fabricated to include one or more sets of calibration patterns used to measure line pitch and line focus.
7582538 Method of overlay measurement for alignment of patterns in semiconductor manufacturing September 1, 2009
A method for semiconductor manufacturing includes forming an overlay target having a pattern formed by a first mask layer and an adjacent layer. The overlay target is exposed to radiation. As a result, reflective beams can be detected from the pattern and the adjacent layer and the l
7566525 Method for forming an anti-etching shielding layer of resist patterns in semiconductor fabricati July 28, 2009
A method is disclosed for forming a photoresist pattern with enhanced etch resistance on a semiconductor substrate. A photoresist pattern is first formed on the substrate. A silicon-containing polymer layer is deposited over the photoresist pattern on the substrate. A thermal treatment i
7557043 Method of fabricating the stacked structure and damascene process July 7, 2009
A method of fabricating a stacked structure for forming a damascene process is described. A doped dielectric layer is formed on a substrate. A surface treatment is performed to the dielectric layer to make the dopant concentration in an upper surface layer of the dielectric layer low
7531296 Method of forming high etch resistant resist patterns May 12, 2009
A method for forming an etch-resistant photoresist pattern on a semiconductor substrate is provided. In one embodiment, a photoresist layer is formed on the substrate. The photoresist layer is exposed and developed to form a photoresist pattern. A polymer-containing layer is formed o
7517746 Metal oxide semiconductor transistor with Y shape metal gate and fabricating method thereof April 14, 2009
A method of manufacturing a metal oxide semiconductor transistor having a metal gate is provided. The method firstly includes a step of providing a substrate. A dummy gate is formed on the substrate, a spacer is formed around the dummy gate, and doped regions are formed in the substrate
7501227 System and method for photolithography in semiconductor manufacturing March 10, 2009
A method for producing a pattern on a substrate includes providing at least one exposure of the pattern onto a layer of the substrate by a higher-precision lithography mechanism and providing at least one exposure of the pattern onto a layer of the substrate by a lower-precision lith
7482280 Method for forming a lithography pattern January 27, 2009
A method of lithography patterning includes forming a first material layer on a substrate, the first material layer being substantially free of silicon, and forming a patterned resist layer including at least one opening therein above the first material layer. A second material layer
7479466 Method of heating semiconductor wafer to improve wafer flatness January 20, 2009
A method of heating-treating a semiconductor wafer is provided. In one embodiment, a first layer is formed over a first side of a substrate. A second layer is formed over the first layer and over a second side of the substrate and the wafer is then flash annealed. In another embodiment,
7450296 Method and system for patterning alignment marks on a transparent substrate November 11, 2008
Disclosed is a method and a system for forming alignment marks on a transparent substrate. A light reflective layer is deposited over an optically transparent substrate of a wafer. A region is defined around an alignment mark on the optically transparent substrate. The light reflecti
7432041 Method and systems to print contact hole patterns October 7, 2008
A method for forming an arbitrary pattern of sub-micron contact holes in a substrate using a combination of interferometric photolithography and optical photolithography with a non-critical mask. The substrate is covered with a photosensitive material and is exposed by a standing wave
7420188 Exposure method and apparatus for immersion lithography September 2, 2008
A method for immersion lithography includes providing a substrate coated with an imaging layer, dispensing a conductive immersion fluid between the substrate and an imaging lens of a lithography system, and performing an exposure process to the imaging layer using a radiation energy thro
7393616 Line end spacing measurement July 1, 2008
A method including: providing collinear first and second lines in a mask layer over a substrate, the first line having at one end a first line end and having a first line body adjacent the first line end, and the second line having at one end a second line end and having a second line bo
7387969 Top patterned hardmask and method for patterning June 17, 2008
A patterned hardmask and method for forming the same, the method including providing a substrate comprising an overlying resist sensitive to activating radiation; forming an overlying hardmask insensitive to the activating radiation; exposing the resist through the hardmask to the ac
7371671 System and method for photolithography in semiconductor manufacturing May 13, 2008
A method for forming a semiconductor device includes forming a photoresist layer over a substrate and patterning the photoresist layer to form photoresist portions. A second layer is formed over the substrate in areas not covered by the photoresist portions and the photoresist portio
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