| Patent Number |
Title Of Patent |
Date Issued |
| 7262125 |
Method of forming low-resistivity tungsten interconnects |
August 28, 2007 |
| Methods and apparatus for preparing a low-resistivity tungsten film on a substrate are provided. Methods involve the formation of a tungsten nucleation layer on a substrate using pulsed nucleation layer (PNL) techniques and depositing a bulk tungsten layer thereon. Methods for formin |
| 7141494 |
Method for reducing tungsten film roughness and improving step coverage |
November 28, 2006 |
| A tungsten nucleation film is formed on a surface of a semiconductor substrate by alternatively providing to that surface, reducing gases and tungsten-containing gases. Each cycle of the method provides for one or more monolayers of the tungsten film. The film is conformal and has im |
| 7005372 |
Deposition of tungsten nitride |
February 28, 2006 |
| Methods for depositing a tungsten nitride layer are described. The methods form a tungsten nitride layer using a carefully controlled deposition technique such as pulsed nucleation layer (PNL). Initially, a tungsten layer is formed on a substrate surface. The tungsten layer is then e |
| 6977014 |
Architecture for high throughput semiconductor processing applications |
December 20, 2005 |
| A semiconductor wafer processing system in accordance with an embodiment of the present invention includes a loading station, a load lock, a process module, an intermediate process module, and a transport module which further includes a load chamber, a transfer chamber, and a pass-throug |
| 6905959 |
Apparatus and method for depositing superior Ta (N) copper thin films for barrier and seed appli |
June 14, 2005 |
| A method of depositing thin films comprising tantalum, tantalum nitride, and copper for barrier films and seed layers within high aspect ratio openings used for copper interconnects. The barrier films and seed layers are deposited at extremely low temperature conditions wherein the wafer |
| 6902620 |
Atomic layer deposition systems and methods |
June 7, 2005 |
| Atomic layer deposition systems and methods are disclosed utilizing a multi-wafer sequential processing chamber. The process gases are sequentially rotated among the wafer stations to deposit a portion of a total deposition thickness on each wafer at each station. A rapid rotary swit |
| 6554914 |
Passivation of copper in dual damascene metalization |
April 29, 2003 |
| The present invention pertains to systems and methods for passivating the copper seed layer deposited in Damascene integrated circuit manufacturing. More specifically, the invention pertains to systems and methods for depositing the copper seed layer by physical vapor deposition, while |
| 6541371 |
Apparatus and method for depositing superior Ta(N)/copper thin films for barrier and seed applic |
April 1, 2003 |
| A method of depositing thin films comprising tantalum, tantalum nitride, and copper for barrier films and seed layers within high aspect ratio openings used for copper interconnects. The barrier films and seed layers are deposited at extremely low temperature conditions wherein the wafer |
| 6534404 |
Method of depositing diffusion barrier for copper interconnect in integrated circuit |
March 18, 2003 |
| Diffusion barriers are used in integrated circuits. The present method of depositing diffusion barriers eliminates the formation of high resistivity phases, providing high electrical conductivity and diffusion suppression between the interconnect conductors, for example copper, and the |
| 6500321 |
Control of erosion profile and process characteristics in magnetron sputtering by geometrical sh |
December 31, 2002 |
| An apparatus and method for controlling and optimizing a non-planar target shape of a sputtering magnetron system are employed to minimize the redeposition of the sputtered material and optimize target erosion. The methodology is based on the integration of sputtered material from each |
| 6497796 |
Apparatus and method for controlling plasma uniformity across a substrate |
December 24, 2002 |
| A magnetron source comprises a hollow cathode with a non-planar target. By using a magnet between the cathode and a substrate, plasma can be controlled to achieve high ionization levels, good step coverage, and good process uniformity. Step coverage uniformity is also improved by con |
| 6497734 |
Apparatus and method for enhanced degassing of semiconductor wafers for increased throughput |
December 24, 2002 |
| A multi-level shelf degas station relying on at least two heaters integrated within wafer holding shelves or slots, where the semiconductor wafers do not have direct contact with the heater shelves. The heaters provide conduction heating. In order to degas a wafer, the heater and waf |
| 6444105 |
Physical vapor deposition reactor including magnet to control flow of ions |
September 3, 2002 |
| A novel hollow cathode magnetron source is disclosed. The source comprises a hollow cathode with a non-planar target. By using a magnet between the cathode and a substrate, plasma can be controlled to achieve high ionization levels, good step coverage, and good process uniformity. |
| 6193854 |
Apparatus and method for controlling erosion profile in hollow cathode magnetron sputter source |
February 27, 2001 |
| A hollow cathode magnetron (HCM) sputter source includes a main magnet positioned near the sidewall of the hollow cathode target and a pair of rotating magnet arrays that are positioned near the closed end of the hollow cathode target. One of the arrays produces a magnetic field that is |
| 6179973 |
Apparatus and method for controlling plasma uniformity across a substrate |
January 30, 2001 |
| A novel hollow cathode magnetron source is disclosed. The source comprises a hollow cathode with a non-planar target. By using a magnet between the cathode and a substrate, plasma can be controlled to achieve high ionization levels, good step coverage, and good process uniformity. |
| 5976310 |
Plasma etch system |
November 2, 1999 |
| Disclosed is a system, including both method and apparatus, for enhancing the plasma etching of a semiconductor wafer. The system enhances etchant uniformity while greatly reducing plasma contamination. Etching is performed in a housing for processing a semiconductor wafer having a wafer |
| 5942799 |
Multilayer diffusion barriers |
August 24, 1999 |
| Multilayer diffusion barriers are used in integrated circuits. These diffusion barriers provide high electrical conductivity to carry current efficiently with fast response time, and additionally suppress diffusion between interconnect conductors, e.g. Cu, and the semiconductor device. |
| 5298465 |
Plasma etching system |
March 29, 1994 |
| Disclosed is a system, including both method and apparatus, for enhancing the plasma etching of a semiconductor wafer. The system enhances etchant uniformity while greatly reducing plasma contamination. Etching is performed in a housing for processing a semiconductor wafer having a wafer |
| 5183775 |
Method for forming capacitor in trench of semiconductor wafer by implantation of trench surfaces |
February 2, 1993 |
| An improved process for formation of a capacitor in a trench formed in a semiconductor wafer is disclosed. The improved process comprises selectively implanting oxygen through the bottom surface of the trench into the region of the wafer adjacent the bottom surface of the trench and |
| 5126231 |
Process for multi-layer photoresist etching with minimal feature undercut and unchanging photore |
June 30, 1992 |
| A process is disclosed for accurately forming an etch mask over the uneven surface of a semiconductor wafer using a multilayer photoresist. The process comprises forming a first or lower photoresist layer on the surface of a semiconductor wafer, forming one or more intermediate layers |
| 5126008 |
Corrosion-free aluminum etching process for fabricating an integrated circuit structure |
June 30, 1992 |
| A process is described for plasma-assisted etching of an aluminum layer to form aluminum lines while fabricating an integrated circuit structure on a semiconductor wafer using one or more bromine-containing etch gases, and optionally SF.sub.6 in combination with the bromine-containing ga |
