Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Letson; Thomas A.
Address:
Beaverton, OR
No. of patents:
8
Patents:












Patent Number Title Of Patent Date Issued
8067818 Nonplanar device with thinned lower body portion and method of fabrication November 29, 2011
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the lateral
7821044 Transistor with improved tip profile and method of manufacture thereof October 26, 2010
Embodiments are an improved transistor structure and the method of fabricating the structure. In particular, a wet etch of an embodiment forms source and drain regions with an improved tip shape to improve the performance of the transistor by improving control of short channel effect
7550333 Nonplanar device with thinned lower body portion and method of fabrication June 23, 2009
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the lateral
7494858 Transistor with improved tip profile and method of manufacture thereof February 24, 2009
Embodiments are an improved transistor structure and the method of fabricating the structure. In particular, a wet etch of an embodiment forms source and drain regions with an improved tip shape to improve the performance of the transistor by improving control of short channel effect
7208399 Transistor with notched gate April 24, 2007
A transistor having a gate electrode with a T-shaped cross section is fabricated from a single layer of conductive material using an etching process. A two process etch is performed to form side walls having a notched profile. The notches allow source and drain regions to be implante
5874358 Via hole profile and method of fabrication February 23, 1999
A novel high performance and reliable interconnection structure for preventing via delamination. The interconnection structure of the present invention comprises a via connection which extends into and undercuts an underlying interconnection line to lock the via connection into the i
5619071 Anchored via connection April 8, 1997
A novel high performance and reliable interconnection structure for preventing via delamination. The interconnection structure of the present invention comprises a via connection which extends into and undercuts an underlying interconnection line to lock the via connection into the i
5470790 Via hole profile and method of fabrication November 28, 1995
A novel high performance and reliable interconnection structure for preventing via delamination. The interconnection structure of the present invention comprises a via connection which extends into and undercuts an underlying interconnection line to lock the via connection into the i










 
 
  Recently Added Patents
Laboratory spatula
Resistor-2 resistor (R-2R) digital-to-analog converter with resistor network reversal
Methods and systems for aggregating and graphically representing information associated with a telecommunications circuit
Microbial fuel cell and method of use
HYR1 as a target for active and passive immunization against Candida
Lighting elements
Sensor controller, navigation device, and sensor control method
  Randomly Featured Patents
Printhead-to-media spacing adjustment apparatus and method
Method and system for supporting multiple cache configurations
Front bezel for computer enclosure
Data error control
Circular saw
Arrangement in a router for inserting address prefixes based on command line address identifiers
Container
Method for manufacturing junction semiconductor device
Forced air ventilation system for footwear
Support for growth medium