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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Lee; Sang-Ho
Address:
Kyounggi, KR
No. of patents:
9
Patents:












Patent Number Title Of Patent Date Issued
8581380 Integrated circuit packaging system with ultra-thin die November 12, 2013
An integrated circuit packaging system with ultra-thin die is provided including providing an ultra-thin integrated circuit stack, having a vertical sidewall contact, including providing a semiconductor wafer having an active side, forming a solder bump on the active side of the semi
8211749 Integrated circuit package system with waferscale spacer July 3, 2012
An integrated circuit packaging system is provided including forming a first device wafer having a first backside and a first active side; forming a waferscale spacer wafer having a waferscale spacer and a first opening; mounting the waferscale spacer wafer on the first backside; and
8039365 Integrated circuit package system including wafer level spacer October 18, 2011
An integrated circuit package system that includes providing a wafer level spacer including apertures, which define unit spacers that are interconnected, and configuring the unit spacers to substantially align over devices formed within a substrate.
8017502 Wafer system with partial cuts September 13, 2011
A wafer system is provided including providing a wafer having a topside and a backside, forming a partial cut from the topside of the wafer within a wafer rim and thinning the wafer from the backside for exposing the partial cut at the backside within the wafer rim.
7838391 Ultra thin bumped wafer with under-film November 23, 2010
A semiconductor device begins with a wafer having a plurality of bumps formed on a surface of the wafer. An under-film layer is formed over the wafer to completely cover all portions of the bumps with the under-film layer. An adhesive layer is formed over the under-film layer. A support
7829986 Integrated circuit package system with net spacer November 9, 2010
A method for manufacturing an integrated circuit package system is provided including: forming a strip level net spacer including support bars, tie bars and paddles; configuring the support bars, the tie bars and the paddles to form four or more open regions around each of the paddle
7812435 Integrated circuit package-in-package system with side-by-side and offset stacking October 12, 2010
An integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrate
7659609 Integrated circuit package-in-package system with carrier interposer February 9, 2010
An integrated circuit package-in-package system includes: mounting an integrated circuit device over a package carrier; forming a subassembly including: providing an integrated circuit package system having a carrier interposer with an integrated circuit die thereover, and mounting a
7659140 Integrated circuit system with a debris trapping system February 9, 2010
An integrated circuit system including: providing an integrated circuit wafer having an integrated circuit side and a backside; mounting a protective adhesive on the integrated circuit side of the integrated circuit wafer; removing material from the backside of the integrated circuit










 
 
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