| Patent Number |
Title Of Patent |
Date Issued |
| 8125236 |
Main board and system for memory mounting test |
February 28, 2012 |
| A main board according to example embodiments may include a substrate and at least one socket. The at least one socket may directly connect a memory module to the substrate in a direction parallel to the substrate. A memory mounting test system including the main board may occupy a s |
| 7979760 |
Test system for conducting parallel bit test |
July 12, 2011 |
| Provided is a test system conducting a parallel bit test. The test system, conducting a parallel bit test on a plurality of memory modules mounted on a socket, comprises a plurality of counters and a comparator. Each of the counters counts the number of data output signals in the same |
| 7814379 |
Memory module packaging test system |
October 12, 2010 |
| A memory module packaging test system may include a plurality of test slots into which a plurality of memory modules may be installed so that the system may simultaneously test the memory modules. The memory module packaging test system may use a server system for a registered dual i |
| 7606110 |
Memory module, memory unit, and hub with non-periodic clock and methods of using the same |
October 20, 2009 |
| A memory module, a memory unit, and a hub with a non-periodic clock and methods for using the same. An example memory module may include a phased locked loop, receiving an external, periodic clock and generating one or more internal periodic clocks and a plurality of memory units, receiv |
| 7487413 |
Memory module testing apparatus and method of testing memory modules |
February 3, 2009 |
| A memory module testing apparatus and method include a test slot adapted to receive a target memory module, wherein the target memory module includes a first memory unit to store information related to the target memory module. The memory module testing apparatus further includes a s |
| 7319635 |
Memory system with registered memory module and control method |
January 15, 2008 |
| A memory module and related method are disclosed. The memory module comprises a clock generator configured to generate first and second internal clock signals in relation to an external clock signal, and a register configured to receive the first and second internal clock signals. Th |
| 7233157 |
Test board for high-frequency system level test |
June 19, 2007 |
| A test board for a high-frequency system level test: The test board includes a main board having through holes filled with a conductive material. These holes may be located at a portion of the main board from which an existing module socket has been removed. An interface board has su |
