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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Kwon; Yong-hwan
Address:
Suwon-si, KR
No. of patents:
2
Patents:




Patent Number Title Of Patent Date Issued
7569423 Wafer-level-chip-scale package and method of fabrication August 4, 2009
A wafer-level-chip-scale package and related method of fabrication are disclosed. The wafer-level-chip-scale package comprises a semiconductor substrate comprising an integrated circuit, a conductive ball disposed on the semiconductor substrate and electrically connected to the integrate
7554201 Tin-bismuth (Sn-Bi) family alloy solder and semiconductor device using the same June 30, 2009
Example embodiments of the present invention relate to an alloy solder and a semiconductor device using the alloy solder. Other example embodiments relate to an alloy solder capable of increasing reliability of a junction between a semiconductor chip and a substrate. According to still I


 
 
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