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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Koch; Gary S.
Address:
Jeffersonville, VT
No. of patents:
3
Patents:












Patent Number Title Of Patent Date Issued
6907554 Built-in self test system and method for two-dimensional memory redundancy allocation June 14, 2005
A built-in self test system (124) and method for two-dimensional memory redundancy allocation. The built-in self test system is adapted to allocate two redundant columns (116) and one redundant row (120) to an embedded memory (104) as needed to repair single cell failures (SCFs) with
6687144 High reliability content-addressable memory using shadow content-addressable memory February 3, 2004
A high-reliability content & addressable memory using a shadow content-addressable memory (CAM) array in parallel with a primary CAM array to increase the reliability of CAM searches. The reliability of CAM searches has been less than desired because of random environmental influence
6650561 High reliability content-addressable memory using shadow content-addressable memory November 18, 2003
A high-reliability content-addressable memory using a shadow content-addressable memory (CAM) array in parallel with a primary CAM array to increase the reliability of CAM searches. The reliability of CAM searches has been less than desired because of random environmental influences










 
 
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