| Patent Number |
Title Of Patent |
Date Issued |
| 7473991 |
Semiconductor device and electric apparatus |
January 6, 2009 |
| A semiconductor device of an embodiment of the invention has a package substrate, and a semiconductor chip mounted on the package substrate. The semiconductor chip has an output section, and a filter section for decreasing the electromagnetic noise generated from the data communicati |
| 6762460 |
Protection circuit provided in semiconductor circuit |
July 13, 2004 |
| A protection circuit including a power supply terminal supplied with a power supply potential, a reference terminal supplied with a reference potential, and a first p-channel MOS transistor having a first gate, a first source, a first drain and a first back gate. The first gate, the |
| 6462611 |
Transmission gate |
October 8, 2002 |
| Two terminals of each of transistors (P1, N1) are connected between two terminals (A, B). A body effect compensation circuit (COMP-P1) for the transistor (P1) and a body effect compensation circuit (COMP-N1) for the transistor (N1) are arranged. The back gates of transistors (P1P, P2P) i |
| 6337603 |
Temperature detector circuit having function for restricting occurrence of output error caused b |
January 8, 2002 |
| A temperature detector circuit for converting a forward drop voltage of a diode to digital data by means of an AD converter is provided. In order to restrict an occurrence of an output error caused by dispersion in diode manufacture, correction data according to digital data obtained by |
| 6335653 |
Transmission gate |
January 1, 2002 |
| Two terminals of each of transistors (P1, N1) are connected between two terminals (A, B). A body effect compensation circuit (COMP-P1) for the transistor (P1) and a body effect compensation circuit (COMP-N1) for the transistor (N1) are arranged. The back gates of transistors (P1P, P2P) i |
| 6249146 |
MOS output buffer with overvoltage protection circuitry |
June 19, 2001 |
| Either the power-supply potential or a ground potential is applied to a power-supply node through a switch. When a potential higher than the ground potential is applied to the output terminal while an power-supply node is connected to the ground-potential node, the potential of a back |
| 6169443 |
Transmission gate |
January 2, 2001 |
| Two terminals of each of transistors (P1, N1) are connected between two terminals (A, B). A body effect compensation circuit (COMP-P1) for the transistor (P1) and a body effect compensation circuit (COMP-N1) for the transistor (N1) are arranged. The back gates of transistors (P1P, P2P) i |
| 6097217 |
MOS output buffer with overvoltage protection circuitry |
August 1, 2000 |
| Either the power-supply potential or a ground potential is applied to a power-supply node through a switch. When a potential higher than the ground potential is applied to an output terminal while the power-supply node is connected to the ground-potential node, the potential of a back |
| 6054736 |
Semiconductor device |
April 25, 2000 |
| A semiconductor device of the present invention comprises: a semiconductor substrate of a first conductive type; a gate electrode formed on the semiconductor substrate; a first semiconductor region of a second conductive type different from the first conductive type, the first semico |
| 6020778 |
Transmission gate including body effect compensation circuit |
February 1, 2000 |
| Two terminals of each of transistors (P1, N1) are connected between two terminals (A, B). A body effect compensation circuit (COMP-P1) for the transistor (P1) and a body effect compensation circuit (COMP-N1) for the transistor (N1) are arranged. The back gates of transistors (P1P, P2P) i |
| 5892387 |
Analog switching circuit device and semiconductor integrated circuit device |
April 6, 1999 |
| In a situation where another analog switching circuit 502 outputs a high potential Vh, this high potential Vh is applied to an output terminal OUT1 of an analog switching circuit 504. When a ground potential is supplied to a node 10 with a changeover switch SW, a diode DD1 falls to an in |
| 5880603 |
MOS output buffer with overvoltage protection circuitry |
March 9, 1999 |
| Either a power-supply potential or a ground potential is applied to a power-supply node through a switch. When a potential higher than the ground potential is applied to an output terminal while the power-supply node is connected to the ground-potential node, the potential of a back |
| 5831449 |
Output circuit for use in a semiconductor integrated circuit |
November 3, 1998 |
| An output circuit comprising an output stage and a control signal generator. The output stage is constituted by a first P-channel MOS transistor and an N-channel MOS transistor. The control signal generator generates a signal for driving the gates of the MOS transistors, it comprises |
| 5825220 |
Auto-clear circuit and integrated circuit including an auto-clear circuit for initialization bas |
October 20, 1998 |
| An auto-clear circuit which has a switch device connected between a power supply voltage terminal and first and second nodes, and a potential division device, connected between the first node and a ground terminal, for outputting a first potential obtained by dividing a potential of the |
| 5821797 |
Protection circuit for semiconductor devices |
October 13, 1998 |
| A protection circuit (1) for input comprises two transistors (11, 12) connected in series between a first voltage supply (V.sub.cc) and a second voltage supply (GND), and an intermediate junction point is used as an input terminal and an output terminal. When a surge voltage is applied t |
| 5739702 |
Bus hold circuit |
April 14, 1998 |
| The bus hold circuit comprises: an input stage inverter (IN1) connected between a first supply voltage (Vcc) terminal and a second supply voltage (Vss) terminal and including: a first P-channel transistor (P1); and a first N-channel transistor (N1) connected in series to the first P-chan |
| 5661414 |
Output circuit for use in a semiconductor integrated circuit |
August 26, 1997 |
| An output circuit comprising an output stage and a control signal generator. The output stage is constituted by a first P-channel MOS transistor and an N-channel MOS transistor. The control signal generator generates a signal for driving the Gates of the MOS transistors, it comprises |
| 5552723 |
CMOS output circuit compensating for back-gate bias effects |
September 3, 1996 |
| An output circuit according to the present invention comprises an input terminal, first and second MOS transistors of a same conductivity type connected in series between first and second power supplies to form a current path, and alternately turned on in response to an input signal |
| 5539327 |
Protection circuit which prevents avalanche breakdown in a fet by having a floating substrate an |
July 23, 1996 |
| A transistor circuit comprises a MOS transistor with an open back gate, and control means for controlling a voltage to be applied to the control gate of the MOS transistor, whereby the control means controls the avalanche breakdown voltage of a parasitic bipolar transistor formed by the |
| 5493233 |
MOSFET circuit apparatus with avalanche breakdown prevention means |
February 20, 1996 |
| A transistor circuit apparatus comprises a MOS transistor to be improved, for preventing an avalanche breakdown, the MOS transistor being connected in a channel conductor path provided between one of power supply terminals and a terminal of an output, a separate circuit connected to the |
| 5442307 |
Interface circuit with backgate bias control of a transistor |
August 15, 1995 |
| An interface circuit includes first and second MOS transistors of depletion type, first and second switching elements, and a control circuit. The current path of the first MOS transistor is connected between an output node of a MOS circuit formed in a semiconductor substrate and an outpu |
| 5389834 |
Output buffer circuit having a DC driver and an AC driver |
February 14, 1995 |
| This invention discloses a signal output circuit including DC and AC buffers having output nodes commonly connected to a signal output terminal, and an AC buffer control circuit for driving the AC buffer when an output from the DC buffer is changed and for controlling an output from |
| 5382846 |
Level shifting circuit for suppressing output amplitude |
January 17, 1995 |
| The source-drain paths of first and second N-channel MOS transistors are series-connected between a first node to which a first power source voltage is applied and a second node to which a ground voltage is applied. The gate of the first MOS transistor is supplied with an input signal an |
| 5321326 |
Output buffer circuit |
June 14, 1994 |
| An output buffer circuit includes a first output buffer having a high output resistance determined by DC specifications, a second output buffer having an output resistance satisfying AC specifications when simultaneously driven with the first output buffer, and a control circuit for |
| 5220205 |
Output circuit of an integrated circuit having immunity to power source fluctuations |
June 15, 1993 |
| A series circuit of two P-channel transistors and a series circuit of two N-channel transistors are used respectively as a latch circuit which temporarily latches an input signal until the power source fluctuation caused by the change of the output signal is suppressed. The gates of the |
| 5175445 |
MOS type input circuit |
December 29, 1992 |
| The source-drain paths of p-channel first and second MOSFETs are connected in series between a node, to which a high-potential power source voltage is supplied, and a signal output node. The source-drain paths of n-channel third and fourth MOSFETs are connected in series between the sign |
| 5107137 |
Master-slave clocked CMOS flip-flop with hysteresis |
April 21, 1992 |
| In a master-slave type flip-flop circuit comprising a master output holding circuit of the master stage circuit, the threshold value of the input circuit of the slave stage circuit has a hysteresis characteristic in which the high level threshold value is set to a higher value than the |
| 5034629 |
Output control circuit for reducing through current in CMOS output buffer |
July 23, 1991 |
| In an output circuit for use in a semiconductor IC comprising a CMOS transistors constituting an output buffer, a transfer gate of CMOS structure is connected between the gates of the CMOS transistors as a resistive element. The transfer gate reduces the changes in the gate potential |
| 4821084 |
Insulated gate type field effect transistor |
April 11, 1989 |
| Extension directions of source electrode layer and a drain electrode are parallel to rows or columns of an array of alternately arranged source regions and drain regions, thereby forming widths of source and drain electrode layers wider than those of a conventional transistor to obtain a |
