| Patent Number |
Title Of Patent |
Date Issued |
| 7569418 |
Methods for securing packaged semiconductor devices to carrier substrates |
August 4, 2009 |
| A method for securing a semiconductor device to a carrier substrate includes inserting a semiconductor device with a plurality of stub contacts extending from a bottom edge thereof into a receptacle of an alignment device associated with the carrier substrate. Upon attachment of the |
| 7408255 |
Assembly for stacked BGA packages |
August 5, 2008 |
| Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays are disclosed. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the subst |
| 7400032 |
Module assembly for stacked BGA packages |
July 15, 2008 |
| Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays are disclosed. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the subst |
| 7396702 |
Module assembly and method for stacked BGA packages |
July 8, 2008 |
| Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays are disclosed. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the subst |
| 7285442 |
Stackable ceramic FBGA for high thermal applications |
October 23, 2007 |
| An apparatus package for high-temperature thermal applications for ball grid array semiconductor devices and a method of packaging ball grid array semiconductor devices. |
| 7282789 |
Back-to-back semiconductor device assemblies |
October 16, 2007 |
| A back-to-back semiconductor device assembly includes two vertically mountable semiconductor devices, the backs of which are secured to one another. The bond pads of both semiconductor devices are disposed adjacent a single, mutual edge of the assembly. The semiconductor devices may |
| 7279797 |
Module assembly and method for stacked BGA packages |
October 9, 2007 |
| Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the substantial matchin |
| 7259450 |
Double-packaged multi-chip semiconductor module |
August 21, 2007 |
| A plurality of semiconductor die is packaged into one component. The inventive design comprises devices which have been singularized, packaged and thoroughly tested for functionality and adherence to required specifications. A plurality of packaged devices is then received by a housi |
| 7227261 |
Vertical surface mount assembly and methods |
June 5, 2007 |
| A vertically mountable semiconductor device assembly including a semiconductor device and a mechanism for attaching the semiconductor device to a carrier substrate. The semiconductor device has each of its bond pads disposed proximate a single edge thereof. At least a portion of the |
| 7214566 |
Semiconductor device package and method |
May 8, 2007 |
| A method of making semiconductor device packages includes the steps of attaching a wafer to a dielectric layer, testing semiconductor devices in the wafer, and then dicing the layered assembly. The dielectric layer may be, for example, a flexible tape. The semiconductor devices may be ch |
| 7183191 |
Method for fabricating a chip scale package using wafer level processing |
February 27, 2007 |
| Channels are formed that pass through an active surface of a semiconductor substrate to provide isolation between adjacent active surface regions defining individual die locations. Bond pads on the substrate are bumped with intermediate conductive elements, after which a material used to |
| 7151013 |
Semiconductor package having exposed heat dissipating surface and method of fabrication |
December 19, 2006 |
| A high density semiconductor package with thermally enhanced properties is described. The semiconductor package includes a pair of lead frames, each being attached to a respective semiconductor die. The dies are attached to respective lead frames via an adhering material, such as a tape. |
| 7125749 |
Varied-thickness heat sink for integrated circuit (IC) packages and method of fabricating IC pac |
October 24, 2006 |
| An integrated circuit package includes a package body, such as a transfer molded plastic or preformed ceramic package body, having an integrated circuit die positioned therein. A lead frame, such as a peripheral lead, Leads-Over-Chip (LOC), or Leads-Under-Chip (LUC) lead frame, includes |
| 7116001 |
Bumped die and wire bonded board-on-chip package |
October 3, 2006 |
| An apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface with at least one opening therethrough. The die includes an active surface and a back su |
| 7115990 |
Bumped die and wire bonded board-on-chip package |
October 3, 2006 |
| An apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface with at least one opening therethrough. The die includes an active surface and a back su |
| 7112252 |
Assembly method for semiconductor die and lead frame |
September 26, 2006 |
| A LOC die assembly is disclosed including a die dielectrically adhered to the underside of a lead frame. The lead frame has stress relief slots formed in the undersides of the lead elements proximate the adhesive to accommodate filler particles lodged between the leads and the active |
| 7091622 |
Semiconductor device, ball grid array connection system, and method of making |
August 15, 2006 |
| A semiconductor device is provided with a metal stiffening layer between the die and a multilayer structure comprising at least two insulating layers each having at least one conductor thereon. A top insulating layer of the multilayer structure contains a ball grid array. The metal layer |
| 7082681 |
Methods for modifying a vertical surface mount package |
August 1, 2006 |
| A vertically mountable semiconductor device including a plurality of stub contacts extending perpendicularly from a bottom edge thereof. The stub contacts may be formed by trimming the leads of an existing vertical surface mount package. A complementary alignment device includes a re |
| 7057291 |
Methods for securing vertically mountable semiconductor devices in back-to back relation |
June 6, 2006 |
| A method for assembling vertically mountable semiconductor devices includes positioning the semiconductor devices so that backsides thereof face one another and that edges of the vertically mountable semiconductor devices along which contacts are disposed are in alignment with each o |
| 7015063 |
Methods of utilizing a back to back semiconductor device module |
March 21, 2006 |
| A back-to-back semiconductor device module includes two semiconductor devices, the backs of which are secured to one another. Each bond pad of both semiconductor devices is disposed adjacent a single, mutual edge of the module. The module may be oriented nonparallel to a carrier substrat |
| 6998860 |
Method for burn-in testing semiconductor dice |
February 14, 2006 |
| A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in oven. The test fixture |
| 6979596 |
Method of fabricating a tape having apertures under a lead frame for conventional IC packages |
December 27, 2005 |
| A semiconductor integrated circuit device, and method of manufacturing the same, having a conventional-type lead frame with the die paddle removed. In particular, the die paddle is replaced with a section of tape that is supported by the ends of the lead fingers. The semiconductor die is |
| 6974725 |
Interconnections for a semiconductor device |
December 13, 2005 |
| A method for forming an electrical contact for a semiconductor device comprises the steps of providing a semiconductor wafer section having a major surface with a plurality of conductive pads thereon and electrically coupling each pad with an elongated electrical interconnect. Next, each |
| 6963128 |
Vertically mountable and alignable semiconductor device assembly |
November 8, 2005 |
| A vertically mountable semiconductor device including a plurality of stub contacts extending perpendicularly from a bottom edge thereof. A complementary alignment device includes a receptacle for receiving the vertically mountable semiconductor device. The alignment device is attacha |
| 6921966 |
Tape under frame for lead frame IC package assembly |
July 26, 2005 |
| A semiconductor integrated circuit device, and method of manufacturing the same, having a conventional-type lead frame with the die paddle removed. In particular, the die paddle is replaced with a section of tape that is supported by the ends of the lead fingers. The semiconductor die is |
| 6911737 |
Semiconductor device package and method |
June 28, 2005 |
| A method of making semiconductor device packages includes the steps of attaching a wafer to a dielectric layer, testing semiconductor devices in the wafer, and then dicing the layered assembly. The dielectric layer may be, for example, a flexible tape. The semiconductor devices may be ch |
| 6906424 |
Semiconductor package and method producing same |
June 14, 2005 |
| A semiconductor device package and method of fabricating same. The package includes a lead frame having a die paddle and a plurality of lead fingers. A first semiconductor die exhibiting a first size is adhered to the die paddle and is electrically coupled with one or more of the plurali |
| 6900079 |
Method for fabricating a chip scale package using wafer level processing |
May 31, 2005 |
| Channels are formed that pass through an active surface of a semiconductor substrate to provide isolation between adjacent active surface regions defining individual die locations. Bond pads on the substrate are bumped with intermediate conductive elements, after which a material used to |
| 6894372 |
Tape under frame for lead frame IC package assembly |
May 17, 2005 |
| A semiconductor integrated circuit device, and method of manufacturing the same, having a conventional-type lead frame with the die paddle removed. In particular, the die paddle is replaced with a section of tape that is supported by the ends of the lead fingers. The semiconductor die is |
| 6873037 |
Vertical surface mount package utilizing a back-to-back semiconductor device module |
March 29, 2005 |
| A back-to-back semiconductor device module including two semiconductor devices, the backs of each being secured to one another. The bond pads of both semiconductor devices are disposed adjacent a single, mutual edge of the device module. The device module may be secured to a carrier subs |
| 6858926 |
Stackable ceramic FBGA for high thermal applications |
February 22, 2005 |
| An apparatus package for high-temperature thermal applications for ball grid array semiconductor devices and a method of packaging ball grid array semiconductor devices. |
| 6838768 |
Module assembly for stacked BGA packages |
January 4, 2005 |
| Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the substantial matching |
| 6828173 |
Semiconductor device including edge bond pads and methods |
December 7, 2004 |
| A vertically mountable semiconductor device including at least one bond pad disposed on an edge thereof. The bond pad includes a conductive bump disposed thereon. The semiconductor device may also include a protective overcoat layer. The present invention also includes a method of fa |
| 6825547 |
Semiconductor device including edge bond pads |
November 30, 2004 |
| A vertically mountable semiconductor device including at least one bond pad disposed on an edge thereof. The bond pad includes a conductive bump disposed thereon. The semiconductor device may also include a protective overcoat layer. The present invention also includes a method of fa |
| 6803656 |
Semiconductor device including combed bond pad opening |
October 12, 2004 |
| A semiconductor device including bond pads disposed proximate an edge thereof, and an overcoat layer. The overcoat layer defines notches around each of the bond pads. The overcoat layer may be formed from a photoimageable material such as a photoimageable epoxy. The invention also in |
| 6800942 |
Vertically mountable semiconductor device and methods |
October 5, 2004 |
| A vertically mountable semiconductor device including a plurality of bond pads disposed proximate to a single edge thereof. The bond pads are bumped with an electrically conductive material. The semiconductor device may also include a support member. Alternatively, the semiconductor devi |
| 6800505 |
Semiconductor device including edge bond pads and related methods |
October 5, 2004 |
| A semiconductor device including at least one contact pad disposed on an edge thereof. The semiconductor device may also include a protective overcoat layer. The present invention also includes a method of fabricating the semiconductor device, including forming disconnected notches i |
| 6798063 |
Low profile ball grid array package |
September 28, 2004 |
| The present invention is a method and apparatus for a very low profile ball grid array package. A substrate is provided with an aperture. A thin sheet material is secured to the substrate, covering the aperture, so as to form a cavity. A semiconductor die is mounted in the formed cavity |
| 6797616 |
Circuit boards containing vias and methods for producing same |
September 28, 2004 |
| The present invention is directed to an apparatus and method for connecting integrated circuits placed on opposite sides of a circuit board through utilization of conduction elements embedded in the circuit board and extending from one surface of the board to the other. Conductive traces |
| 6781839 |
Vertical surface mount apparatus with thermal carrier and method |
August 24, 2004 |
| A high density vertical surface mount package and thermal carrier therefore including a heat sink. |
| 6780746 |
Method for fabricating a chip scale package using wafer level processing and devices resulting t |
August 24, 2004 |
| Channels are formed that pass through an active surface of a semiconductor substrate to provide isolation between adjacent active surface regions defining individual die locations. Bond pads on the substrate are bumped with intermediate conductive elements, after which a material used to |
| 6774486 |
Circuit boards containing vias and methods for producing same |
August 10, 2004 |
| The present invention is directed to an apparatus and method for connecting integrated circuits placed on opposite sides of a circuit board through utilization of conduction elements embedded in the circuit board and extending from one surface of the board to the other. Conductive traces |
| 6773965 |
Semiconductor device, ball grid array connection system, and method of making |
August 10, 2004 |
| A semiconductor device is provided with a metal stiffening layer between the die and a multilayer structure comprising at least two insulating layers each having at least one conductor thereon. A top insulating layer of the multilayer structure contains a ball grid array. The metal layer |
| 6765803 |
Semiconductor device socket |
July 20, 2004 |
| A socket that secures bare and minimally packaged semiconductor devices substantially perpendicularly relative to a carrier substrate. The socket includes intermediate conductive elements and a member which moves the intermediate conductive elements between an insertion position and a |
| 6760224 |
Heat sink with alignment and retaining features |
July 6, 2004 |
| An apparatus for providing heat sinks or heat spreaders for stacked semiconductor devices. Alignment apparatus may be included for the alignment of the stacked semiconductor devices. An enclosure may be used as the heat sink or heat spreader. |
| 6744137 |
Bumped die and wire bonded board-on-chip package |
June 1, 2004 |
| An apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface with at least one opening therethrough. The die includes an active surface and a back su |
| 6737734 |
Structure and method for securing bussing leads |
May 18, 2004 |
| A hybrid lead frame having leads for conventional lead-to-I/O wire bonding, and leads for power and ground bussing that extend over a surface of the semiconductor die are provided where the leads for bussing are held in place by lead-lock tape to prevent bending and/or other movement of |
| 6735102 |
256 Meg dynamic random access memory |
May 11, 2004 |
| A 256 Meg dynamic random access memory is comprised of a plurality of cells organized into individual arrays, which are organized into 32 Meg array blocks, which are organized into 64 Meg quadrants. Sense amplifiers are positioned between adjacent rows in the individual arrays; row decod |
| 6734529 |
Vertically mountable interposer and assembly |
May 11, 2004 |
| A support assembly for mounting a semiconductor device vertically relative to a carrier substrate. The support assembly includes an interposer to which the semiconductor device is attached. The support assembly also includes traces carried on the interposer, which electronically connect |
| 6730994 |
Interdigitated capacitor design for integrated circuit lead frames and methods |
May 4, 2004 |
| A semiconductor device includes a two-part, coplanar, interdigitated decoupling capacitor formed as a part of the conductive lead frame. For down-bonded dice, the die attach paddle is formed as the interdigitated member. Alternatively, an interdigitated capacitor may be placed as a LOC |
