| Patent Number |
Title Of Patent |
Date Issued |
| 5077722 |
Disk drive insertion and removal interlock |
December 31, 1991 |
| An interlock for a disk drive unit having a handle and a camming arrangement responsive to pivotal movements for inserting and withdrawing the unit from a housing fixture. A solenoid is actuable to lock the handle when the unit is fully inserted. A sensor is adapted for sensing an in |
| 4942518 |
Cache store bypass for computer |
July 17, 1990 |
| A physical cache unit (100) is used within a computer (20). The computer (20) further includes a main memory (99) a memory control unit (22), inputs/output processors (54, 68) and a central processor (156). The central processor includes an address translation unit (118), an instruct |
| 4884191 |
Memory array unit for computer |
November 28, 1989 |
| The computer (10) includes a memory control unit (12), a central processing unit (14) and a memory array unit (16). A plurality of memory array planes (36, 38, 40 and 42) are included within the memory array unit (16). A latch (82) receives write data from the memory control unit (12) th |
| 4868742 |
Input/output bus for system which generates a new header parcel when an interrupted data block t |
September 19, 1989 |
| A communication bus (14) provides bidirectional data communication between a computer (12) and various peripheral units including input/output processors (18, 20) and a service processor (22). The computer includes a memory control unit (24) which is connected to a memory array (26). A |
| 4760522 |
Intermixing of different capacity memory array units in a computer |
July 26, 1988 |
| A memory array unit (20) is used within a main memory (26) of a computer system (10). The memory (26) comprises a plurality of memory array units (20, 22, 24) and each of the memory array units (20, 22, 24) has an allocated address range of 0 to 16 megabytes. However, the memory array |
| 4704599 |
Auxiliary power connector and communication channel control circuit |
November 3, 1987 |
| An auxiliary connector circuit is used within an electronic system (10) which comprises a plurality of removable circuit cards (14, 16, 18, 20, 22, 24, 26) which are mounted within a cabinet (12). Before the circuit card (16) is removed from the cabinet (12), a power cable (44) is co |
| 4663728 |
Read/modify/write circuit for computer memory operation |
May 5, 1987 |
| A read/modify/write circuit (10) for a computer is used in conjunction with a main memory (12) in which block operations are executed using a plurality of data units. The circuit (10) includes a first register connected to receive a data block from the main memory (12), a second regi |
| 4646233 |
Physical cache unit for computer |
February 24, 1987 |
| A physical cache unit (100) is used within a computer (20). The computer (20) further includes a main memory (99) a memory control unit (22), inputs/output processors (54, 68) and a central processor (156). The central processor includes an address translation unit (118), an instruct |
| 4620275 |
Computer system |
October 28, 1986 |
| A vector processing computer is configured to operate in a pipelined fashion wherein each of the functional units is essentially independent and is designed to carry out its operational function in the fastest possible manner. Vector elements are transmitted from memory, either main |
