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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Keswick; Paul D.
Address:
Morgan Hill, CA
No. of patents:
3
Patents:












Patent Number Title Of Patent Date Issued
8264043 Protection of integrated circuit gates during metallization processes September 11, 2012
In one embodiment, a first transistor is configured to switch ON to discharge accumulated charges on an interconnect line during a metallization process. This advantageously protects a second transistor, which is coupled to the interconnect line, from charge buildup. The gate of the
7627838 Automated integrated circuit development December 1, 2009
Customization methodology for integrated circuit (e.g., clocks) design customization using a software tool that integrates multiple integrated circuit development operations.
7033900 Protection of integrated circuit gates during metallization processes April 25, 2006
In one embodiment, a first transistor is configured to switch ON to discharge accumulated charges on an interconnect line during a metallization process. This advantageously protects a second transistor, which is coupled to the interconnect line, from charge buildup. The gate of the










 
 
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