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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Kazumi; Hideyuki
Address:
Hitachi, JP
No. of patents:
14
Patents:












Patent Number Title Of Patent Date Issued
7049243 Surface processing method of a specimen and surface processing apparatus of the specimen May 23, 2006
A plasma processing method for etching a sample having a gate oxide film which generates a plasma in a vacuum chamber using electromagnetic waves, applies an rf bias power to the sample, turns off the rf bias power before a charged voltage of the sample reaches a breakdown voltage of the
6846363 Plasma processing apparatus and method January 25, 2005
A plasma is generated by feeding an antenna with radio-frequency electric power generated by a radio-frequency power source, and one end of the antenna is grounded to the earth through a capacitor of variable capacitance. A Faraday shield is electrically isolated from the earth, and
6833051 Plasma processing apparatus and method December 21, 2004
A plasma processing apparatus includes a vacuum chamber having a structure that surrounds a space where plasma is generated, a sample stage disposed in the chamber on which a sample to be processed is placed and coil antenna providing an electric field to the space. The structure has a
6756737 Plasma processing apparatus and method June 29, 2004
The main purpose of the present invention is to suppress deposition of byproducts on an inner wall of a vacuum chamber during wafer processing using plasma generated by an inductive coupling antenna and an electrostatic capacitive coupling antenna which are connected in series at a c
6677244 Specimen surface processing method January 13, 2004
A plasma processing method for etching a sample having a gate oxide film includes generating a plasma in a vacuum chamber using electromagnetic waves, applying an rf bias power to the sample, turning off the rf bias power before a charged voltage of the sample reaches a breakdown voltage
6499424 Plasma processing apparatus and method December 31, 2002
A plasma is generated by feeding an antenna with radio-frequency electric power generated by a radio-frequency power source, and one end of the antenna is grounded to the earth through a capacitor of variable capacitance. A Faraday shield is electrically isolated from the earth, and
6492277 Specimen surface processing method and apparatus December 10, 2002
Electrical damage to semiconductor elements in the plasma etching thereof is suppressed. In processing of a fine pattern by plasma etching, the high frequency power supply to be applied to the specimen is turned off before the charge potential at a portion of the pattern reaches the brea
6481370 Plasma processsing apparatus November 19, 2002
A plasma is generated by feeding an antenna with radio-frequency electric power generated by a radio-frequency power source, and one end of the antenna is grounded to the earth through a capacitor of variable capacitance. A Faraday shield is electrically isolated from the earth, and
6388382 Plasma processing apparatus and method May 14, 2002
The main purpose of the present invention is to suppress deposition of byproducts on an inner wall of a vacuum chamber during wafer processing using plasma generated by an inductive coupling antenna and an electrostatic capacitive coupling antenna which are connected in series at a c
6309980 Semiconductor integrated circuit arrangement fabrication method October 30, 2001
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable sta
6180019 Plasma processing apparatus and method January 30, 2001
A plasma is generated by feeding an antenna with radio-frequency electric power generated by a radio-frequency power source, and one end of the antenna is grounded to the earth through a capacitor of variable capacitance. A Faraday shield is electrically isolated from the earth, and
6074958 Semiconductor integrated circuit arrangement fabrication method June 13, 2000
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable sta
5962347 Semiconductor integrated circuit arrangement fabrication method October 5, 1999
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable sta
5874013 Semiconductor integrated circuit arrangement fabrication method February 23, 1999
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable sta










 
 
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