| Patent Number |
Title Of Patent |
Date Issued |
| 7564073 |
CMOS and HCMOS semiconductor integrated circuit |
July 21, 2009 |
| A semiconductor integrated circuit fabrication method according to this invention includes: a step of forming a pair of first device forming regions and a pair of second device forming regions in a surface layer portion of a semiconductor substrate by surrounding each of the regions |
| 7554139 |
Semiconductor manufacturing method and semiconductor device |
June 30, 2009 |
| A production method for a semiconductor device according to the present invention includes: step (A) of providing a substrate including a semiconductor layer having a principal face, the substrate having a device isolation structure (STI) formed in an isolation region 70 for partitio |
| 7119417 |
Semiconductor device and fabrication method thereof |
October 10, 2006 |
| A semiconductor device of this invention includes: a semiconductor substrate; a gate electrode formed on the semiconductor substrate; a pair of source and drain electrodes respectively formed in regions of the semiconductor substrate situated on opposite sides of the gate electrode i |
| 7087473 |
Method of forming conventional complementary MOS transistors and complementary heterojunction MO |
August 8, 2006 |
| A semiconductor integrated circuit fabrication method according to this invention includes: a step of forming a pair of first device forming regions and a pair of second device forming regions in a surface layer portion of a semiconductor substrate by surrounding each of the regions |
